From 5c398a2e70724bdbe669cb5d5fff567c4c4e825a Mon Sep 17 00:00:00 2001 From: Kathryn Long Date: Sat, 6 Apr 2024 16:16:55 -0400 Subject: [PATCH 01/15] Allow CI to continue on nightly failure From 1ba0c3fa31a67ff432caaf9a2e1cbf2e9fb5ad74 Mon Sep 17 00:00:00 2001 From: Alex Huszagh Date: Sun, 21 Sep 2025 10:42:08 -0500 Subject: [PATCH 02/15] Remove num-traits documentation. --- src/lib.rs | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/src/lib.rs b/src/lib.rs index 48034fb..321ef71 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -23,9 +23,7 @@ //! [`struct@bf16`] are lossy operations, and just as converting a [`f64`] to //! [`f32`] is lossy and does not have `Into`/`From` trait implementations, so //! too do these smaller types not have those trait implementations either. -//! Instead, use `from_f32`/`from_f64` functions for the types in this crate. If -//! you don't care about lossy conversions and need trait conversions, use the -//! appropriate [`num-traits`] traits that are implemented. +//! Instead, use `from_f32`/`from_f64` functions for the types in this crate. //! //! The crate supports `#[no_std]` when the `std` cargo feature is not enabled, //! so can be used in embedded environments without using the Rust [`std`] From f70f5b71c9710e9f476240c296b7e7fc7475de1c Mon Sep 17 00:00:00 2001 From: Kathryn Long Date: Thu, 13 Mar 2025 19:29:09 -0400 Subject: [PATCH 03/15] suppress unexpected_cfg lint warnings, update changelog --- CHANGELOG.md | 2 ++ src/lib.rs | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 15f317c..c41c940 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -456,6 +456,7 @@ These were all changes for half, which `float16` is a fork of. [#100]: https://github.com/starkat99/half-rs/issues/100 [#103]: https://github.com/starkat99/half-rs/issues/103 [#107]: https://github.com/starkat99/half-rs/issues/107 +[#110]: https://github.com/starkat99/half-rs/issues/110 @@ -479,6 +480,7 @@ These were all changes for half, which `float16` is a fork of. [@wx-csy]: https://github.com/wx-csy [@eiz]: https://github.com/eiz [@comath]: https://github.com/comath +[@FL33TW00D]: https://github.com/FL33TW00D diff --git a/src/lib.rs b/src/lib.rs index 321ef71..632e07e 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -60,7 +60,7 @@ //! [`binary16`]: https://en.wikipedia.org/wiki/Half-precision_floating-point_format //! [`bfloat16`]: https://en.wikipedia.org/wiki/Bfloat16_floating-point_format #![allow(unknown_lints)] -#![allow(clippy::verbose_bit_mask, clippy::cast_lossless)] +#![allow(clippy::verbose_bit_mask, clippy::cast_lossless, unexpected_cfgs)] #![cfg_attr(not(feature = "std"), no_std)] #![doc(html_root_url = "https://docs.rs/float16/0.1.3")] #![doc(test(attr(deny(warnings), allow(unused))))] From 62da652702b6d0b07a8e2637aa8a82bac784923d Mon Sep 17 00:00:00 2001 From: Kathryn Long Date: Thu, 13 Mar 2025 22:38:11 -0400 Subject: [PATCH 04/15] move license files and bump to versoin 2.5.0 --- CHANGELOG.md | 3 + LICENSE | 1 - LICENSE-APACHE | 176 ++++++++++++++++++++++++++++++++++++++++ LICENSE-MIT | 19 +++++ LICENSES/Apache-2.0.txt | 73 ----------------- LICENSES/MIT.txt | 9 -- README.md | 10 +-- 7 files changed, 203 insertions(+), 88 deletions(-) delete mode 100644 LICENSE create mode 100644 LICENSE-APACHE create mode 100644 LICENSE-MIT delete mode 100644 LICENSES/Apache-2.0.txt delete mode 100644 LICENSES/MIT.txt diff --git a/CHANGELOG.md b/CHANGELOG.md index c41c940..f5f67f1 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -40,6 +40,9 @@ and this project adheres to [Semantic Versioning](http://semver.org/spec/v2.0.0. - Disabled hardware instrinsics by default for `f16` to `f64` and `f64` to `f16` conversions, due to lossy results with an intermediate `f32` (see [#161](https://github.com/starkat99/half-rs/issues/116)). - Silenced most clippy lints. +- Suppressed unexpected_cfg lint warnings on newer versions of stable Rust. +- Resolved ambiguous rustdoc warnings due to new unstable `f16` primitive in compiler. + # Half Changelog These were all changes for half, which `float16` is a fork of. diff --git a/LICENSE b/LICENSE deleted file mode 100644 index 03f646f..0000000 --- a/LICENSE +++ /dev/null @@ -1 +0,0 @@ -MIT OR Apache-2.0 diff --git a/LICENSE-APACHE b/LICENSE-APACHE new file mode 100644 index 0000000..d9a10c0 --- /dev/null +++ b/LICENSE-APACHE @@ -0,0 +1,176 @@ + Apache License + Version 2.0, January 2004 + http://www.apache.org/licenses/ + + TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION + + 1. 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IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. diff --git a/README.md b/README.md index aa408a5..53c8df9 100644 --- a/README.md +++ b/README.md @@ -36,15 +36,15 @@ for specific CPU features which avoids the runtime overhead and works in a `no_s ## License -This library is distributed under the terms of either of: +All files in this library are dual-licensed and distributed under the terms of either of: -- [MIT License](LICENSES/MIT.txt) ([http://opensource.org/licenses/MIT](http://opensource.org/licenses/MIT)) -- [Apache License, Version 2.0](LICENSES/Apache-2.0.txt) ([http://www.apache.org/licenses/LICENSE-2.0](http://www.apache.org/licenses/LICENSE-2.0)) +- [MIT License](LICENSE-MIT) + ([http://opensource.org/licenses/MIT](http://opensource.org/licenses/MIT)) +- [Apache License, Version 2.0](LICENSE-APACHE) + ([http://www.apache.org/licenses/LICENSE-2.0](http://www.apache.org/licenses/LICENSE-2.0)) at your option. -This project is [REUSE-compliant](https://reuse.software/spec/). Copyrights are retained by their contributors. Some files may include explicit copyright notices and/or license [SPDX identifiers](https://spdx.dev/ids/). For full authorship information, see the version control history. - ### Contributing Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in the work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without any additional terms or conditions. From c767dcf2cb20cc22ec3a3c99a259bf46fb1828d4 Mon Sep 17 00:00:00 2001 From: Kathryn Long Date: Fri, 21 Mar 2025 16:50:13 -0400 Subject: [PATCH 05/15] Update unmaintained/outdated CI actions --- .github/workflows/rust.yml | 15 +++++---------- 1 file changed, 5 insertions(+), 10 deletions(-) diff --git a/.github/workflows/rust.yml b/.github/workflows/rust.yml index 339fb1e..a282b55 100644 --- a/.github/workflows/rust.yml +++ b/.github/workflows/rust.yml @@ -42,7 +42,7 @@ jobs: uses: dtolnay/rust-toolchain@master with: toolchain: ${{ matrix.rust }} - target: ${{ matrix.target }}-unknown-linux-gnu + targets: ${{ matrix.target }}-unknown-linux-gnu components: clippy,rustfmt - name: Windows Install Rust toolchain @@ -50,20 +50,19 @@ jobs: uses: dtolnay/rust-toolchain@master with: toolchain: ${{ matrix.rust }} - target: ${{ matrix.target }}-pc-windows-msvc + targets: ${{ matrix.target }}-pc-windows-msvc components: clippy,rustfmt - name: Install Cargo Make if: ${{ matrix.target == 'x86_64' }} uses: davidB/rust-cargo-make@v1 - - name: cargo-make ci-flow + - run: cargo make ci-flow if: ${{ matrix.target == 'x86_64' }} - run: cargo make ci-flow - name: linux cargo-make build-only if: ${{ matrix.target != 'x86_64' && matrix.os == 'ubuntu-latest' }} - run: cargo build --target ${{ matrix.target }}-unknown-linux-gnu + run: cargo build --all-features --target ${{ matrix.target }}-unknown-linux-gnu - name: windows cargo-make build-only if: ${{ matrix.target != 'x86_64' && matrix.os == 'windows-latest' }} @@ -84,11 +83,7 @@ jobs: with: toolchain: nightly components: miri - - name: Run Miri - uses: actions-rs/cargo@v1 - with: - command: miri - args: test + - run: cargo miri test env: MIRIFLAGS: -Zmiri-strict-provenance From 48b313f504e09822967d678fa50616a9bde81900 Mon Sep 17 00:00:00 2001 From: Mark Gottscho Date: Tue, 6 May 2025 14:16:19 -0700 Subject: [PATCH 06/15] Fix bug #126: handle NaNs correctly in min() and max() --- src/bfloat.rs | 50 +++++++++++++++++++++++++++++++++++++++++++++++-- src/binary16.rs | 50 +++++++++++++++++++++++++++++++++++++++++++++++-- 2 files changed, 96 insertions(+), 4 deletions(-) diff --git a/src/bfloat.rs b/src/bfloat.rs index c8da24c..89f8a9e 100644 --- a/src/bfloat.rs +++ b/src/bfloat.rs @@ -676,7 +676,7 @@ impl bf16 { #[inline] #[must_use] pub const fn max(self, other: bf16) -> bf16 { - if gt(other, self) && !other.is_nan() { + if self.is_nan() || gt(other, self) { other } else { self @@ -699,7 +699,7 @@ impl bf16 { #[inline] #[must_use] pub const fn min(self, other: bf16) -> bf16 { - if lt(other, self) && !other.is_nan() { + if self.is_nan() || lt(other, self) { other } else { self @@ -1978,4 +1978,50 @@ mod test { None, ); } + + #[test] + fn test_max() { + let a = bf16::from_f32(0.0); + let b = bf16::from_f32(42.0); + assert_eq!(a.max(b), b); + + let a = bf16::from_f32(42.0); + let b = bf16::from_f32(0.0); + assert_eq!(a.max(b), a); + + let a = bf16::NAN; + let b = bf16::from_f32(42.0); + assert_eq!(a.max(b), b); + + let a = bf16::from_f32(42.0); + let b = bf16::NAN; + assert_eq!(a.max(b), a); + + let a = bf16::NAN; + let b = bf16::NAN; + assert!(a.max(b).is_nan()); + } + + #[test] + fn test_min() { + let a = bf16::from_f32(0.0); + let b = bf16::from_f32(42.0); + assert_eq!(a.min(b), a); + + let a = bf16::from_f32(42.0); + let b = bf16::from_f32(0.0); + assert_eq!(a.min(b), b); + + let a = bf16::NAN; + let b = bf16::from_f32(42.0); + assert_eq!(a.min(b), b); + + let a = bf16::from_f32(42.0); + let b = bf16::NAN; + assert_eq!(a.min(b), a); + + let a = bf16::NAN; + let b = bf16::NAN; + assert!(a.min(b).is_nan()); + } } diff --git a/src/binary16.rs b/src/binary16.rs index ab953d1..d16c4f8 100644 --- a/src/binary16.rs +++ b/src/binary16.rs @@ -736,7 +736,7 @@ impl f16 { #[inline] #[must_use] pub const fn max(self, other: f16) -> f16 { - if gt(other, self) && !other.is_nan() { + if self.is_nan() || gt(other, self) { other } else { self @@ -759,7 +759,7 @@ impl f16 { #[inline] #[must_use] pub const fn min(self, other: f16) -> f16 { - if lt(other, self) && !other.is_nan() { + if self.is_nan() || lt(other, self) { other } else { self @@ -2121,4 +2121,50 @@ mod test { None, ); } + + #[test] + fn test_max() { + let a = f16::from_f32(0.0); + let b = f16::from_f32(42.0); + assert_eq!(a.max(b), b); + + let a = f16::from_f32(42.0); + let b = f16::from_f32(0.0); + assert_eq!(a.max(b), a); + + let a = f16::NAN; + let b = f16::from_f32(42.0); + assert_eq!(a.max(b), b); + + let a = f16::from_f32(42.0); + let b = f16::NAN; + assert_eq!(a.max(b), a); + + let a = f16::NAN; + let b = f16::NAN; + assert!(a.max(b).is_nan()); + } + + #[test] + fn test_min() { + let a = f16::from_f32(0.0); + let b = f16::from_f32(42.0); + assert_eq!(a.min(b), a); + + let a = f16::from_f32(42.0); + let b = f16::from_f32(0.0); + assert_eq!(a.min(b), b); + + let a = f16::NAN; + let b = f16::from_f32(42.0); + assert_eq!(a.min(b), b); + + let a = f16::from_f32(42.0); + let b = f16::NAN; + assert_eq!(a.min(b), a); + + let a = f16::NAN; + let b = f16::NAN; + assert!(a.min(b).is_nan()); + } } From d01184845c602bd8649a6d09d12ab0735452c908 Mon Sep 17 00:00:00 2001 From: Kathryn Long Date: Wed, 28 May 2025 20:38:32 -0400 Subject: [PATCH 07/15] Allow unnecessary_transmutes in CI, will add modify crate for this in future --- .circleci/config.yml | 2 +- .github/workflows/rust.yml | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/.circleci/config.yml b/.circleci/config.yml index fef46c3..06323c2 100644 --- a/.circleci/config.yml +++ b/.circleci/config.yml @@ -20,7 +20,7 @@ jobs: RUSTUP_MAX_RETRIES: 10 CARGO_TERM_COLOR: always RUST_BACKTRACE: full - RUSTFLAGS: "-D warnings" + RUSTFLAGS: "-D warnings -A unnecessary_transmutes" CARGO_PROFILE_DEV_DEBUG: 0 CARGO_PROFILE_TEST_DEBUG: 0 CARGO_PROFILE_BENCH_DEBUG: 0 diff --git a/.github/workflows/rust.yml b/.github/workflows/rust.yml index a282b55..9a5cdb8 100644 --- a/.github/workflows/rust.yml +++ b/.github/workflows/rust.yml @@ -8,7 +8,7 @@ env: RUSTUP_MAX_RETRIES: 10 CARGO_TERM_COLOR: always RUST_BACKTRACE: full - RUSTFLAGS: "-D warnings" + RUSTFLAGS: "-D warnings -A unnecessary_transmutes" # Disable debuginfo for faster compile CARGO_PROFILE_DEV_DEBUG: 0 CARGO_PROFILE_TEST_DEBUG: 0 From a77d5dd8a3eec6f7860d8b6af0d20f60ab615c5d Mon Sep 17 00:00:00 2001 From: Kathryn Long Date: Wed, 28 May 2025 20:45:56 -0400 Subject: [PATCH 08/15] Fix lint warning in crate instead of CI --- .circleci/config.yml | 2 +- .github/workflows/rust.yml | 2 +- src/lib.rs | 4 ++++ 3 files changed, 6 insertions(+), 2 deletions(-) diff --git a/.circleci/config.yml b/.circleci/config.yml index 06323c2..fef46c3 100644 --- a/.circleci/config.yml +++ b/.circleci/config.yml @@ -20,7 +20,7 @@ jobs: RUSTUP_MAX_RETRIES: 10 CARGO_TERM_COLOR: always RUST_BACKTRACE: full - RUSTFLAGS: "-D warnings -A unnecessary_transmutes" + RUSTFLAGS: "-D warnings" CARGO_PROFILE_DEV_DEBUG: 0 CARGO_PROFILE_TEST_DEBUG: 0 CARGO_PROFILE_BENCH_DEBUG: 0 diff --git a/.github/workflows/rust.yml b/.github/workflows/rust.yml index 9a5cdb8..a282b55 100644 --- a/.github/workflows/rust.yml +++ b/.github/workflows/rust.yml @@ -8,7 +8,7 @@ env: RUSTUP_MAX_RETRIES: 10 CARGO_TERM_COLOR: always RUST_BACKTRACE: full - RUSTFLAGS: "-D warnings -A unnecessary_transmutes" + RUSTFLAGS: "-D warnings" # Disable debuginfo for faster compile CARGO_PROFILE_DEV_DEBUG: 0 CARGO_PROFILE_TEST_DEBUG: 0 diff --git a/src/lib.rs b/src/lib.rs index 632e07e..34c016d 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -66,6 +66,10 @@ #![doc(test(attr(deny(warnings), allow(unused))))] #![cfg_attr(docsrs, feature(doc_auto_cfg))] +// Until updated to use newly stabilized `from_bits`, disable new lint warning about the transmutes +#![allow(unknown_lints, unnecessary_transmutes)] +#![warn(unknown_lints)] + mod bfloat; mod binary16; mod error; From bc22cfa819f4a095c98a5219980dc29e8d715661 Mon Sep 17 00:00:00 2001 From: Kathryn Long Date: Wed, 28 May 2025 20:47:51 -0400 Subject: [PATCH 09/15] Fix fmt error --- src/lib.rs | 1 - 1 file changed, 1 deletion(-) diff --git a/src/lib.rs b/src/lib.rs index 34c016d..8cb0c8a 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -65,7 +65,6 @@ #![doc(html_root_url = "https://docs.rs/float16/0.1.3")] #![doc(test(attr(deny(warnings), allow(unused))))] #![cfg_attr(docsrs, feature(doc_auto_cfg))] - // Until updated to use newly stabilized `from_bits`, disable new lint warning about the transmutes #![allow(unknown_lints, unnecessary_transmutes)] #![warn(unknown_lints)] From a2ac4101cb2e7ae154d3926323503661687ba584 Mon Sep 17 00:00:00 2001 From: Kathryn Long Date: Wed, 28 May 2025 20:52:51 -0400 Subject: [PATCH 10/15] Merge pull request #127 from mgottscho/mgottscho/issue-126 Fix bug #126: handle NaNs correctly in min() and max() From 0dda27cd09e4aafa68a1ac22a5c3f9adfea5781c Mon Sep 17 00:00:00 2001 From: Kathryn Long Date: Wed, 28 May 2025 20:59:45 -0400 Subject: [PATCH 11/15] Update changelog --- CHANGELOG.md | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index f5f67f1..7364277 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -4,6 +4,9 @@ The format is based on [Keep a Changelog](http://keepachangelog.com/en/1.0.0/) and this project adheres to [Semantic Versioning](http://semver.org/spec/v2.0.0.html). ## [Unreleased] +### Fixed +- `min` and `max` incorrectly propagate `NaN` values when `self` is `NaN`. Fixes [#126], + by [@mgottscho]. ## [0.1.3][v0.1.3] - 2024-12-21 @@ -460,6 +463,7 @@ These were all changes for half, which `float16` is a fork of. [#103]: https://github.com/starkat99/half-rs/issues/103 [#107]: https://github.com/starkat99/half-rs/issues/107 [#110]: https://github.com/starkat99/half-rs/issues/110 +[#126]: https://github.com/starkat99/half-rs/issues/126 @@ -483,7 +487,7 @@ These were all changes for half, which `float16` is a fork of. [@wx-csy]: https://github.com/wx-csy [@eiz]: https://github.com/eiz [@comath]: https://github.com/comath -[@FL33TW00D]: https://github.com/FL33TW00D +[@mgottscho]: https://github.com/mgottscho From cbbeeeea98e041495373164d63b4005c872c0540 Mon Sep 17 00:00:00 2001 From: WANG Rui Date: Mon, 25 Aug 2025 16:44:15 +0800 Subject: [PATCH 12/15] LoongArch64 FP16 hardware support LoongArch is a RISC instruction set architecture and currently a Tier-2 (with host-tools) target [^1] in the Rust upstream community. This patch introduces FP16 conversion functions based on the LoongArch SIMD extension to improve performance. Benchmarks: ``` HalfFloatSliceExt::convert_from_f32_slice/constants time: [10.816 ns 10.823 ns 10.831 ns] change: [-63.769% -63.728% -63.693%] (p = 0.00 < 0.05) Performance has improved. HalfFloatSliceExt::convert_from_f32_slice/large time: [137.68 ns 137.77 ns 137.88 ns] change: [-94.847% -94.841% -94.834%] (p = 0.00 < 0.05) Performance has improved. HalfFloatSliceExt::convert_from_f64_slice/constants time: [12.656 ns 12.669 ns 12.684 ns] change: [-78.455% -78.418% -78.367%] (p = 0.00 < 0.05) Performance has improved. HalfFloatSliceExt::convert_from_f64_slice/large time: [544.15 ns 544.49 ns 544.91 ns] change: [-89.799% -89.791% -89.781%] (p = 0.00 < 0.05) Performance has improved. HalfFloatSliceExt::convert_to_f32_slice/constants time: [6.0412 ns 6.0442 ns 6.0482 ns] change: [-74.100% -74.068% -74.042%] (p = 0.00 < 0.05) Performance has improved. HalfFloatSliceExt::convert_to_f32_slice/large time: [512.78 ns 513.08 ns 513.45 ns] change: [-77.628% -77.526% -77.422%] (p = 0.00 < 0.05) Performance has improved. HalfFloatSliceExt::convert_to_f64_slice/constants time: [10.779 ns 10.784 ns 10.792 ns] change: [-49.028% -48.922% -48.813%] (p = 0.00 < 0.05) Performance has improved. HalfFloatSliceExt::convert_to_f64_slice/large time: [923.19 ns 923.77 ns 924.50 ns] change: [-80.876% -80.862% -80.849%] (p = 0.00 < 0.05) Performance has improved. ``` [^1]: https://doc.rust-lang.org/stable/rustc/platform-support/loongarch-linux.html --- README.md | 1 + src/binary16/arch.rs | 79 ++++++++++++++++++++++++++++++-- src/binary16/arch/loongarch64.rs | 63 +++++++++++++++++++++++++ src/lib.rs | 1 + 4 files changed, 141 insertions(+), 3 deletions(-) create mode 100644 src/binary16/arch/loongarch64.rs diff --git a/README.md b/README.md index 53c8df9..3711961 100644 --- a/README.md +++ b/README.md @@ -28,6 +28,7 @@ for specific CPU features which avoids the runtime overhead and works in a `no_s | ------------ | ------------------ | ----- | | `x86`/`x86_64` | `f16c` | This supports conversion to/from `f16` only (including vector SIMD) and does not support any `bf16` or arithmetic operations. | | `aarch64` | `fp16` | This supports all operations on `f16` only. | +| `loongarch64` | `lsx` | This supports conversion to/from `f16` only (including vector SIMD) and does not support any `bf16` or arithmetic operations. | ### More Documentation diff --git a/src/binary16/arch.rs b/src/binary16/arch.rs index bf59b33..730d6ec 100644 --- a/src/binary16/arch.rs +++ b/src/binary16/arch.rs @@ -9,10 +9,14 @@ mod x86; #[cfg(target_arch = "aarch64")] mod aarch64; +#[cfg(target_arch = "loongarch64")] +mod loongarch64; + macro_rules! convert_fn { - ( - if x86_feature("f16c") { $f16c:expr }else if aarch64_feature("fp16") { $aarch64:expr }else { $fallback:expr } - ) => { + (if x86_feature("f16c") { $f16c:expr } + else if aarch64_feature("fp16") { $aarch64:expr } + else if loongarch64_feature("lsx") { $loongarch64:expr } + else { $fallback:expr }) => { cfg_if::cfg_if! { // Use intrinsics directly when a compile target or using no_std if #[cfg(all( @@ -29,6 +33,12 @@ macro_rules! convert_fn { ))] { $aarch64 } + else if #[cfg(all( + target_arch = "loongarch64", + target_feature = "lsx" + ))] { + $loongarch64 + } // Use CPU feature detection if using std else if #[cfg(all( @@ -55,6 +65,17 @@ macro_rules! convert_fn { $fallback } } + else if #[cfg(all( + feature = "std", + target_arch = "loongarch64", + ))] { + use std::arch::is_loongarch_feature_detected; + if is_loongarch_feature_detected!("lsx") { + $loongarch64 + } else { + $fallback + } + } // Fallback to software else { @@ -71,6 +92,8 @@ pub(crate) fn f32_to_f16(f: f32) -> u16 { unsafe { x86::f32_to_f16_x86_f16c(f) } } else if aarch64_feature("fp16") { unsafe { aarch64::f32_to_f16_fp16(f) } + } else if loongarch64_feature("lsx") { + unsafe { loongarch64::f32_to_f16_lsx(f) } } else { f32_to_f16_fallback(f) } @@ -84,6 +107,8 @@ pub(crate) fn f64_to_f16(f: f64) -> u16 { unsafe { x86::f64_to_f16_x86_f16c(f) } } else if aarch64_feature("fp16") { unsafe { aarch64::f64_to_f16_fp16(f) } + } else if loongarch64_feature("lsx") { + f64_to_f16_fallback(f) } else { f64_to_f16_fallback(f) } @@ -97,6 +122,8 @@ pub(crate) fn f16_to_f32(i: u16) -> f32 { unsafe { x86::f16_to_f32_x86_f16c(i) } } else if aarch64_feature("fp16") { unsafe { aarch64::f16_to_f32_fp16(i) } + } else if loongarch64_feature("lsx") { + unsafe { loongarch64::f16_to_f32_lsx(i) } } else { f16_to_f32_fallback(i) } @@ -110,6 +137,8 @@ pub(crate) fn f16_to_f64(i: u16) -> f64 { unsafe { x86::f16_to_f64_x86_f16c(i) } } else if aarch64_feature("fp16") { unsafe { aarch64::f16_to_f64_fp16(i) } + } else if loongarch64_feature("lsx") { + unsafe { loongarch64::f16_to_f32_lsx(i) as f64 } } else { f16_to_f64_fallback(i) } @@ -123,6 +152,8 @@ pub(crate) fn f32x4_to_f16x4(f: &[f32; 4]) -> [u16; 4] { unsafe { x86::f32x4_to_f16x4_x86_f16c(f) } } else if aarch64_feature("fp16") { unsafe { aarch64::f32x4_to_f16x4_fp16(f) } + } else if loongarch64_feature("lsx") { + unsafe { loongarch64::f32x4_to_f16x4_lsx(f) } } else { f32x4_to_f16x4_fallback(f) } @@ -136,6 +167,8 @@ pub(crate) fn f16x4_to_f32x4(i: &[u16; 4]) -> [f32; 4] { unsafe { x86::f16x4_to_f32x4_x86_f16c(i) } } else if aarch64_feature("fp16") { unsafe { aarch64::f16x4_to_f32x4_fp16(i) } + } else if loongarch64_feature("lsx") { + unsafe { loongarch64::f16x4_to_f32x4_lsx(i) } } else { f16x4_to_f32x4_fallback(i) } @@ -149,6 +182,8 @@ pub(crate) fn f64x4_to_f16x4(f: &[f64; 4]) -> [u16; 4] { unsafe { x86::f64x4_to_f16x4_x86_f16c(f) } } else if aarch64_feature("fp16") { unsafe { aarch64::f64x4_to_f16x4_fp16(f) } + } else if loongarch64_feature("lsx") { + unsafe { loongarch64::f64x4_to_f16x4_lsx(f) } } else { f64x4_to_f16x4_fallback(f) } @@ -162,6 +197,8 @@ pub(crate) fn f16x4_to_f64x4(i: &[u16; 4]) -> [f64; 4] { unsafe { x86::f16x4_to_f64x4_x86_f16c(i) } } else if aarch64_feature("fp16") { unsafe { aarch64::f16x4_to_f64x4_fp16(i) } + } else if loongarch64_feature("lsx") { + unsafe { loongarch64::f16x4_to_f64x4_lsx(i) } } else { f16x4_to_f64x4_fallback(i) } @@ -180,6 +217,13 @@ pub(crate) fn f32x8_to_f16x8(f: &[f32; 8]) -> [u16; 8] { aarch64::f32x4_to_f16x4_fp16); result } + } else if loongarch64_feature("lsx") { + { + let mut result = [0u16; 8]; + convert_chunked_slice_4(f.as_slice(), result.as_mut_slice(), + loongarch64::f32x4_to_f16x4_lsx); + result + } } else { f32x8_to_f16x8_fallback(f) } @@ -198,6 +242,13 @@ pub(crate) fn f16x8_to_f32x8(i: &[u16; 8]) -> [f32; 8] { aarch64::f16x4_to_f32x4_fp16); result } + } else if loongarch64_feature("lsx") { + { + let mut result = [0f32; 8]; + convert_chunked_slice_4(i.as_slice(), result.as_mut_slice(), + loongarch64::f16x4_to_f32x4_lsx); + result + } } else { f16x8_to_f32x8_fallback(i) } @@ -216,6 +267,13 @@ pub(crate) fn f64x8_to_f16x8(f: &[f64; 8]) -> [u16; 8] { aarch64::f64x4_to_f16x4_fp16); result } + } else if loongarch64_feature("lsx") { + { + let mut result = [0u16; 8]; + convert_chunked_slice_4(f.as_slice(), result.as_mut_slice(), + loongarch64::f64x4_to_f16x4_lsx); + result + } } else { f64x8_to_f16x8_fallback(f) } @@ -234,6 +292,13 @@ pub(crate) fn f16x8_to_f64x8(i: &[u16; 8]) -> [f64; 8] { aarch64::f16x4_to_f64x4_fp16); result } + } else if loongarch64_feature("lsx") { + { + let mut result = [0f64; 8]; + convert_chunked_slice_4(i.as_slice(), result.as_mut_slice(), + loongarch64::f16x4_to_f64x4_lsx); + result + } } else { f16x8_to_f64x8_fallback(i) } @@ -248,6 +313,8 @@ pub(crate) fn f32_to_f16_slice(src: &[f32], dst: &mut [u16]) { x86::f32x4_to_f16x4_x86_f16c) } else if aarch64_feature("fp16") { convert_chunked_slice_4(src, dst, aarch64::f32x4_to_f16x4_fp16) + } else if loongarch64_feature("lsx") { + convert_chunked_slice_4(src, dst, loongarch64::f32x4_to_f16x4_lsx) } else { slice_fallback(src, dst, f32_to_f16_fallback) } @@ -262,6 +329,8 @@ pub(crate) fn f16_to_f32_slice(src: &[u16], dst: &mut [f32]) { x86::f16x4_to_f32x4_x86_f16c) } else if aarch64_feature("fp16") { convert_chunked_slice_4(src, dst, aarch64::f16x4_to_f32x4_fp16) + } else if loongarch64_feature("lsx") { + convert_chunked_slice_4(src, dst, loongarch64::f16x4_to_f32x4_lsx) } else { slice_fallback(src, dst, f16_to_f32_fallback) } @@ -276,6 +345,8 @@ pub(crate) fn f64_to_f16_slice(src: &[f64], dst: &mut [u16]) { x86::f64x4_to_f16x4_x86_f16c) } else if aarch64_feature("fp16") { convert_chunked_slice_4(src, dst, aarch64::f64x4_to_f16x4_fp16) + } else if loongarch64_feature("lsx") { + convert_chunked_slice_4(src, dst, loongarch64::f64x4_to_f16x4_lsx) } else { slice_fallback(src, dst, f64_to_f16_fallback) } @@ -290,6 +361,8 @@ pub(crate) fn f16_to_f64_slice(src: &[u16], dst: &mut [f64]) { x86::f16x4_to_f64x4_x86_f16c) } else if aarch64_feature("fp16") { convert_chunked_slice_4(src, dst, aarch64::f16x4_to_f64x4_fp16) + } else if loongarch64_feature("lsx") { + convert_chunked_slice_4(src, dst, loongarch64::f16x4_to_f64x4_lsx) } else { slice_fallback(src, dst, f16_to_f64_fallback) } diff --git a/src/binary16/arch/loongarch64.rs b/src/binary16/arch/loongarch64.rs new file mode 100644 index 0000000..567842f --- /dev/null +++ b/src/binary16/arch/loongarch64.rs @@ -0,0 +1,63 @@ +use core::{mem::MaybeUninit, ptr}; + +#[cfg(target_arch = "loongarch64")] +use core::arch::loongarch64::{lsx_vfcvt_h_s, lsx_vfcvtl_s_h, m128, m128i}; + +/////////////// loongarch64 lsx/lasx //////////////// + +#[target_feature(enable = "lsx")] +#[inline] +pub(super) unsafe fn f16_to_f32_lsx(i: u16) -> f32 { + let mut vec = MaybeUninit::::zeroed(); + vec.as_mut_ptr().cast::().write(i); + let retval = lsx_vfcvtl_s_h(vec.assume_init()); + *(&retval as *const m128).cast() +} + +#[target_feature(enable = "lsx")] +#[inline] +pub(super) unsafe fn f32_to_f16_lsx(f: f32) -> u16 { + let mut vec = MaybeUninit::::zeroed(); + vec.as_mut_ptr().cast::().write(f); + let retval = lsx_vfcvt_h_s(vec.assume_init(), vec.assume_init()); + *(&retval as *const m128i).cast() +} + +#[target_feature(enable = "lsx")] +#[inline] +pub(super) unsafe fn f16x4_to_f32x4_lsx(v: &[u16; 4]) -> [f32; 4] { + let mut vec = MaybeUninit::::zeroed(); + ptr::copy_nonoverlapping(v.as_ptr(), vec.as_mut_ptr().cast(), 4); + let retval = lsx_vfcvtl_s_h(vec.assume_init()); + *(&retval as *const m128).cast() +} + +#[target_feature(enable = "lsx")] +#[inline] +pub(super) unsafe fn f32x4_to_f16x4_lsx(v: &[f32; 4]) -> [u16; 4] { + let mut vec = MaybeUninit::::uninit(); + ptr::copy_nonoverlapping(v.as_ptr(), vec.as_mut_ptr().cast(), 4); + let retval = lsx_vfcvt_h_s(vec.assume_init(), vec.assume_init()); + *(&retval as *const m128i).cast() +} + +#[target_feature(enable = "lsx")] +#[inline] +pub(super) unsafe fn f16x4_to_f64x4_lsx(v: &[u16; 4]) -> [f64; 4] { + let array = f16x4_to_f32x4_lsx(v); + // Let compiler vectorize this regular cast for now. + [ + array[0] as f64, + array[1] as f64, + array[2] as f64, + array[3] as f64, + ] +} + +#[target_feature(enable = "lsx")] +#[inline] +pub(super) unsafe fn f64x4_to_f16x4_lsx(v: &[f64; 4]) -> [u16; 4] { + // Let compiler vectorize this regular cast for now. + let v = [v[0] as f32, v[1] as f32, v[2] as f32, v[3] as f32]; + f32x4_to_f16x4_lsx(&v) +} diff --git a/src/lib.rs b/src/lib.rs index 8cb0c8a..cade315 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -49,6 +49,7 @@ //! | ------------ | ------------------ | ----- | //! | `x86`/`x86_64` | `f16c` | This supports conversion to/from [`struct@f16`] only (including vector SIMD) and does not support any [`struct@bf16`] or arithmetic operations. | //! | `aarch64` | `fp16` | This supports all operations on [`struct@f16`] only. | +//! | `loongarch64` | `lsx` | This supports conversion to/from [`struct@f16`] only (including vector SIMD) and does not support any [`struct@bf16`] or arithmetic operations. | //! //! # Cargo Features //! From d4a7f226b8f497fa0731c9b00768f5ed2585be60 Mon Sep 17 00:00:00 2001 From: Kathryn Long Date: Wed, 10 Sep 2025 21:32:17 -0400 Subject: [PATCH 13/15] Merge pull request #131 from heiher/loong64-fp16 LoongArch64 FP16 hardware support From 99bc62af1f4ab0fce7aeac8179d2c36fb5de8849 Mon Sep 17 00:00:00 2001 From: Alex Huszagh Date: Sun, 21 Sep 2025 11:26:53 -0500 Subject: [PATCH 14/15] Patch lints within our CI. --- src/binary16/arch/x86.rs | 2 +- src/lib.rs | 1 - 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/src/binary16/arch/x86.rs b/src/binary16/arch/x86.rs index 4f7373f..331ceed 100644 --- a/src/binary16/arch/x86.rs +++ b/src/binary16/arch/x86.rs @@ -1,7 +1,7 @@ #![cfg(has_x86_intrinsics)] #![allow(unused_imports)] // NOTE: We feature gate this so it will never happen. -#![allow(clippy::incompatible_msrv)] +#![allow(unknown_lints, clippy::incompatible_msrv)] #[cfg(target_arch = "x86")] use core::arch::x86::_mm_cvtps_ph; diff --git a/src/lib.rs b/src/lib.rs index cade315..75554a2 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -60,7 +60,6 @@ //! [`std`]: https://doc.rust-lang.org/std/ //! [`binary16`]: https://en.wikipedia.org/wiki/Half-precision_floating-point_format //! [`bfloat16`]: https://en.wikipedia.org/wiki/Bfloat16_floating-point_format -#![allow(unknown_lints)] #![allow(clippy::verbose_bit_mask, clippy::cast_lossless, unexpected_cfgs)] #![cfg_attr(not(feature = "std"), no_std)] #![doc(html_root_url = "https://docs.rs/float16/0.1.3")] From 0837de6a0f087693dbbbd3b7e1cdb1941859484b Mon Sep 17 00:00:00 2001 From: Alex Huszagh Date: Sun, 21 Sep 2025 11:30:11 -0500 Subject: [PATCH 15/15] Patch our rust formatting. --- src/binary16/arch.rs | 7 +++---- src/binary16/arch/loongarch64.rs | 10 ++-------- 2 files changed, 5 insertions(+), 12 deletions(-) diff --git a/src/binary16/arch.rs b/src/binary16/arch.rs index 730d6ec..a96aced 100644 --- a/src/binary16/arch.rs +++ b/src/binary16/arch.rs @@ -13,10 +13,9 @@ mod aarch64; mod loongarch64; macro_rules! convert_fn { - (if x86_feature("f16c") { $f16c:expr } - else if aarch64_feature("fp16") { $aarch64:expr } - else if loongarch64_feature("lsx") { $loongarch64:expr } - else { $fallback:expr }) => { + ( + if x86_feature("f16c") { $f16c:expr }else if aarch64_feature("fp16") { $aarch64:expr }else if loongarch64_feature("lsx") { $loongarch64:expr }else { $fallback:expr } + ) => { cfg_if::cfg_if! { // Use intrinsics directly when a compile target or using no_std if #[cfg(all( diff --git a/src/binary16/arch/loongarch64.rs b/src/binary16/arch/loongarch64.rs index 567842f..5e075cc 100644 --- a/src/binary16/arch/loongarch64.rs +++ b/src/binary16/arch/loongarch64.rs @@ -1,7 +1,6 @@ -use core::{mem::MaybeUninit, ptr}; - #[cfg(target_arch = "loongarch64")] use core::arch::loongarch64::{lsx_vfcvt_h_s, lsx_vfcvtl_s_h, m128, m128i}; +use core::{mem::MaybeUninit, ptr}; /////////////// loongarch64 lsx/lasx //////////////// @@ -46,12 +45,7 @@ pub(super) unsafe fn f32x4_to_f16x4_lsx(v: &[f32; 4]) -> [u16; 4] { pub(super) unsafe fn f16x4_to_f64x4_lsx(v: &[u16; 4]) -> [f64; 4] { let array = f16x4_to_f32x4_lsx(v); // Let compiler vectorize this regular cast for now. - [ - array[0] as f64, - array[1] as f64, - array[2] as f64, - array[3] as f64, - ] + [array[0] as f64, array[1] as f64, array[2] as f64, array[3] as f64] } #[target_feature(enable = "lsx")]