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// ! Bit mask to indicate detector mismatches (bit ON means mismatch). Bit 0-6: mismatch at ITS layer. Bit 7-9: # of TPC mismatches in the ranges 0, 1, 2-3, 4-7, 8-15, 16-31, 32-63, >64. Bit 10: TRD, bit 11: TOF, bit 15: indicates negative label
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enum McMaskEnum : uint16_t {
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MismatchInITS0 = 0x1, // BIT(0) Mismatch in the layer 0 of ITS
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MismatchInITS1 = 0x2, // BIT(1) Mismatch in the layer 1 of ITS
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MismatchInITS2 = 0x4, // BIT(2) Mismatch in the layer 2 of ITS
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MismatchInITS3 = 0x8, // BIT(3) Mismatch in the layer 3 of ITS
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MismatchInITS4 = 0x10, // BIT(4) Mismatch in the layer 4 of ITS
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MismatchInITS5 = 0x20, // BIT(5) Mismatch in the layer 5 of ITS
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MismatchInITS6 = 0x40, // BIT(6) Mismatch in the layer 6 of ITS
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MismatchInTPC0 = 0x80, // BIT(7) Mismatch in the 0 of TPC
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MismatchInTPC1 = 0x100, // BIT(8) Mismatch in the 1 of TPC
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MismatchInTPC2 = 0x200, // BIT(9) Mismatch in the 2 of TPC
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MismatchInTRD = 0x400, // BIT(10) Mismatch in the TRD
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MismatchInTOF = 0x800, // BIT(11) Mismatch in the TOF
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