Skip to content

Commit a72c7e5

Browse files
hoshinolinajannau
authored andcommitted
KVM: arm64: Expose TSO capability to guests and context switch
Signed-off-by: Asahi Lina <lina@asahilina.net>
1 parent 7e460fe commit a72c7e5

File tree

2 files changed

+12
-0
lines changed

2 files changed

+12
-0
lines changed

arch/arm64/include/asm/kvm_emulate.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -72,6 +72,9 @@ static inline void vcpu_reset_hcr(struct kvm_vcpu *vcpu)
7272
vcpu->arch.hcr_el2 = HCR_GUEST_FLAGS;
7373
if (has_vhe() || has_hvhe())
7474
vcpu->arch.hcr_el2 |= HCR_E2H;
75+
if (IS_ENABLED(CONFIG_ARM64_ACTLR_STATE) &&
76+
alternative_has_cap_unlikely(ARM64_HAS_TSO_APPLE))
77+
vcpu->arch.hcr_el2 &= ~HCR_TACR;
7578
if (cpus_have_final_cap(ARM64_HAS_RAS_EXTN)) {
7679
/* route synchronous external abort exceptions to EL2 */
7780
vcpu->arch.hcr_el2 |= HCR_TEA;

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,8 @@
1616
#include <asm/kvm_hyp.h>
1717
#include <asm/kvm_mmu.h>
1818

19+
#define SYS_IMP_APL_ACTLR_EL12 sys_reg(3, 6, 15, 14, 6)
20+
1921
static inline void __sysreg_save_common_state(struct kvm_cpu_context *ctxt)
2022
{
2123
ctxt_sys_reg(ctxt, MDSCR_EL1) = read_sysreg(mdscr_el1);
@@ -70,6 +72,9 @@ static inline void __sysreg_save_el1_state(struct kvm_cpu_context *ctxt)
7072
ctxt_sys_reg(ctxt, SP_EL1) = read_sysreg(sp_el1);
7173
ctxt_sys_reg(ctxt, ELR_EL1) = read_sysreg_el1(SYS_ELR);
7274
ctxt_sys_reg(ctxt, SPSR_EL1) = read_sysreg_el1(SYS_SPSR);
75+
if (IS_ENABLED(CONFIG_ARM64_ACTLR_STATE) &&
76+
alternative_has_cap_unlikely(ARM64_HAS_TSO_APPLE))
77+
ctxt_sys_reg(ctxt, ACTLR_EL1) = read_sysreg_s(SYS_IMP_APL_ACTLR_EL12);
7378
}
7479

7580
static inline void __sysreg_save_el2_return_state(struct kvm_cpu_context *ctxt)
@@ -138,6 +143,10 @@ static inline void __sysreg_restore_el1_state(struct kvm_cpu_context *ctxt)
138143
write_sysreg(ctxt_sys_reg(ctxt, PAR_EL1), par_el1);
139144
write_sysreg(ctxt_sys_reg(ctxt, TPIDR_EL1), tpidr_el1);
140145

146+
if (IS_ENABLED(CONFIG_ARM64_ACTLR_STATE) &&
147+
alternative_has_cap_unlikely(ARM64_HAS_TSO_APPLE))
148+
write_sysreg_s(ctxt_sys_reg(ctxt, ACTLR_EL1), SYS_IMP_APL_ACTLR_EL12);
149+
141150
if (ctxt_has_mte(ctxt)) {
142151
write_sysreg_el1(ctxt_sys_reg(ctxt, TFSR_EL1), SYS_TFSR);
143152
write_sysreg_s(ctxt_sys_reg(ctxt, TFSRE0_EL1), SYS_TFSRE0_EL1);

0 commit comments

Comments
 (0)