sdkconfig.defaults

# sdkconfig.defaults – RIVR Embedded Node
# Applied by `idf.py build` before the interactive menuconfig values.
# Override any setting here to pin it for the project.

# ── CPU + Flash ──────────────────────────────────────────────────────────────
# 240 MHz for best LoRa throughput
CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ_240=y
CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y
CONFIG_ESPTOOLPY_FLASHFREQ_80M=y
CONFIG_ESPTOOLPY_FLASHMODE_DIO=y

# ── FreeRTOS ─────────────────────────────────────────────────────────────────
# 1 ms tick (matches tb_millis() — vTaskDelay(1) = 1 ms)
CONFIG_FREERTOS_HZ=1000
CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH=3072

# ── Main task stack ──────────────────────────────────────────────────────────
# The Rust RIVR engine init (parse + compile + graph build) uses deep recursion.
# Default 3584 bytes overflows; 16 KB provides sufficient headroom.
CONFIG_ESP_MAIN_TASK_STACK_SIZE=16384

# ── Logging ──────────────────────────────────────────────────────────────────
# INFO default: hides driver ESP_LOGD spam
CONFIG_LOG_DEFAULT_LEVEL_INFO=y
# Keep max at DEBUG; use esp_log_level_set for per-tag DEBUG
CONFIG_LOG_MAXIMUM_LEVEL_DEBUG=y
# Allow runtime esp_log_level_set overrides
CONFIG_LOG_DYNAMIC_LEVEL_CONTROL=y

# ── UART console ─────────────────────────────────────────────────────────────
CONFIG_ESP_CONSOLE_UART_DEFAULT=y
CONFIG_ESP_CONSOLE_UART_NUM=0
CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200

# ── Partition table ──────────────────────────────────────────────────────────
CONFIG_PARTITION_TABLE_SINGLE_APP=y
# IDF v5.5 bootloader for ESP32 is ~29 KB, which overflows the classic 28 KB
# window ending at 0x8000.  Move partition table to 0x9000 (32 KB for bootloader).
CONFIG_PARTITION_TABLE_OFFSET=0x9000

# ── SPI ──────────────────────────────────────────────────────────────────────
# SPI ISR handler in IRAM
CONFIG_SPI_MASTER_IN_IRAM=y

# ── GPIO ─────────────────────────────────────────────────────────────────────
CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL=y

# ── Disable unused stacks to save RAM ────────────────────────────────────────
CONFIG_BT_ENABLED=n
CONFIG_WIFI_ENABLED=n
CONFIG_ESP_COREDUMP_ENABLE_TO_NONE=y
# ── Task Watchdog (hardware WDT) ─────────────────────────────────────────────
# Main task registers itself via esp_task_wdt_add() and feeds the WDT once per
# main-loop iteration.  If the loop stalls, WDT fires a panic after 30 s.
# 30 s is conservative: normal loop latency is ≤ 100 ms (radio TX + vTaskDelay).
# IDLE tasks are excluded — they may be starved during long LoRa TX windows.
CONFIG_ESP_TASK_WDT_EN=y
CONFIG_ESP_TASK_WDT_PANIC=y
CONFIG_ESP_TASK_WDT_TIMEOUT_S=30
CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0=n
CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1=n