diff --git a/test/packs/ARM/RteTest_DFP/0.2.0/ARM.RteTest_DFP.pdsc b/test/packs/ARM/RteTest_DFP/0.2.0/ARM.RteTest_DFP.pdsc index 1c4803031..e6582a048 100644 --- a/test/packs/ARM/RteTest_DFP/0.2.0/ARM.RteTest_DFP.pdsc +++ b/test/packs/ARM/RteTest_DFP/0.2.0/ARM.RteTest_DFP.pdsc @@ -474,7 +474,7 @@ - + scvd test diff --git a/tools/projmgr/src/ProjMgrRunDebug.cpp b/tools/projmgr/src/ProjMgrRunDebug.cpp index 7411927cb..d6720a546 100644 --- a/tools/projmgr/src/ProjMgrRunDebug.cpp +++ b/tools/projmgr/src/ProjMgrRunDebug.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2024-2025 Arm Limited. All rights reserved. + * Copyright (c) 2024-2026 Arm Limited. All rights reserved. * * SPDX-License-Identifier: Apache-2.0 */ @@ -211,17 +211,26 @@ bool ProjMgrRunDebug::CollectSettings(const vector& contexts, cons m_runDebug.systemDescriptions.push_back(item); } } - StrVec scvdFiles; + // scvd + StrVecMap scvdFiles; for (const auto& context : contexts) { for (const auto& [scvdFile, _] : context->rteActiveTarget->GetScvdFiles()) { - CollectionUtils::PushBackUniquely(scvdFiles, scvdFile); + CollectionUtils::PushBackUniquely(scvdFiles[scvdFile], context->deviceItem.pname); } } - for (const auto& scvdFile : scvdFiles) { - FilesType item; - item.file = scvdFile; - item.type = "scvd"; - m_runDebug.systemDescriptions.push_back(item); + for (const auto& [scvdFile, pnameVec] : scvdFiles) { + const bool allPnames = pnameVec.size() == pnames.size(); + // when one file is valid for multiple cores, but not for all cores -> multiple entries with a different pname each + for (const auto& pname : pnameVec) { + FilesType item; + item.file = scvdFile; + item.type = "scvd"; + item.pname = allPnames ? "" : pname; + m_runDebug.systemDescriptions.push_back(item); + if (allPnames) { + break; + } + } } // outputs diff --git a/tools/projmgr/test/data/TestRunDebug/core0.cproject.yml b/tools/projmgr/test/data/TestRunDebug/core0.cproject.yml index cc3854288..2c70a95fb 100644 --- a/tools/projmgr/test/data/TestRunDebug/core0.cproject.yml +++ b/tools/projmgr/test/data/TestRunDebug/core0.cproject.yml @@ -3,3 +3,6 @@ project: device: :cm0_core0 + + components: + - component: RteTest:scvd diff --git a/tools/projmgr/test/data/TestRunDebug/ref/run-debug+TestHW2.cbuild.yml b/tools/projmgr/test/data/TestRunDebug/ref/run-debug+TestHW2.cbuild.yml index 01f143fe7..f9411ef27 100644 --- a/tools/projmgr/test/data/TestRunDebug/ref/run-debug+TestHW2.cbuild.yml +++ b/tools/projmgr/test/data/TestRunDebug/ref/run-debug+TestHW2.cbuild.yml @@ -76,7 +76,7 @@ build: category: doc version: 0.1.1 - component: ARM::RteTest:scvd@1.1.1 - condition: ARMCM3 RteTest + condition: DeviceDependent from-pack: ARM::RteTest_DFP@0.2.0 selected-by: RteTest:scvd files: diff --git a/tools/projmgr/test/data/TestRunDebug/ref/run-debug+TestHW3.cbuild-run.yml b/tools/projmgr/test/data/TestRunDebug/ref/run-debug+TestHW3.cbuild-run.yml index f36cf8cbb..375bcd820 100644 --- a/tools/projmgr/test/data/TestRunDebug/ref/run-debug+TestHW3.cbuild-run.yml +++ b/tools/projmgr/test/data/TestRunDebug/ref/run-debug+TestHW3.cbuild-run.yml @@ -54,6 +54,9 @@ cbuild-run: system-descriptions: - file: ${CMSIS_PACK_ROOT}/ARM/RteTest_DFP/0.2.0/Device/ARM/SVD/ARMCM0.svd type: svd + - file: ${CMSIS_PACK_ROOT}/ARM/RteTest_DFP/0.2.0/Components/RteTest.scvd + type: scvd + pname: cm0_core0 debugger: name: CMSIS-DAP@pyOCD protocol: swd