65816 Differences is Missing Some Detail.

[Yazwh0]

https://github.com/X16Community/x16-docs/blob/master/X16%20Reference%20-%20Appendix%20F%20-%2065C816%20Processor.md#compatibility-with-the-65c02

According to the images here the 65816 isn't cycle compatible with the 65c02 when reading registers with side effects.

These are worth mentioning as they could cause subtle compatibility bugs, not just with the vera data ports, but any IO device.

I've not been able to check, but I assume the undefined 'nops' are also different. These are also useful, eg having a 1 cycle nop vs the documented 2 cycle version.

[mooinglemur]

Regarding the second point, the 65C816 only has two NOP instructions: the original $EA, and $42. Both are 2-cycle. $42 takes two bytes, and it was originally designed as for "future expansion". It might be viable to use to control a bus-snooping add-on card.

The rest of the opcode table is filled out with instructions, none of them one-cycle.