From 3625f0131fdc1ee4029c1e836457bd64c39abdb8 Mon Sep 17 00:00:00 2001 From: Kevin Gillespie Date: Wed, 3 Dec 2025 15:41:56 -0600 Subject: [PATCH 1/2] Add RTC square wave output GPIO configuration. --- Libraries/PeriphDrivers/Include/MAX32657/mxc_pins.h | 3 +++ Libraries/PeriphDrivers/Source/RTC/rtc_me30.c | 2 +- Libraries/PeriphDrivers/Source/SYS/pins_me30.c | 5 +++++ 3 files changed, 9 insertions(+), 1 deletion(-) diff --git a/Libraries/PeriphDrivers/Include/MAX32657/mxc_pins.h b/Libraries/PeriphDrivers/Include/MAX32657/mxc_pins.h index a103efe4161..43acb39c06c 100644 --- a/Libraries/PeriphDrivers/Include/MAX32657/mxc_pins.h +++ b/Libraries/PeriphDrivers/Include/MAX32657/mxc_pins.h @@ -58,4 +58,7 @@ extern const mxc_gpio_cfg_t gpio_cfg_spi_ts0; extern const mxc_gpio_cfg_t gpio_cfg_spi_ts1; extern const mxc_gpio_cfg_t gpio_cfg_spi_ts2; +// RTC square wave output +extern const mxc_gpio_cfg_t gpio_cfg_rtcsqw; + #endif // LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32657_MXC_PINS_H_ diff --git a/Libraries/PeriphDrivers/Source/RTC/rtc_me30.c b/Libraries/PeriphDrivers/Source/RTC/rtc_me30.c index 0c1ee8dc6db..8a8b207fbab 100644 --- a/Libraries/PeriphDrivers/Source/RTC/rtc_me30.c +++ b/Libraries/PeriphDrivers/Source/RTC/rtc_me30.c @@ -82,7 +82,7 @@ int MXC_RTC_Init(uint32_t sec, uint16_t ssec) int MXC_RTC_SquareWaveStart(mxc_rtc_freq_sel_t ft) { - // TODO(RTC): Use MCR registers for GPIO Port 1 configuration. + MXC_GPIO_Config(&gpio_cfg_rtcsqw); MXC_MCR->outen |= MXC_F_MCR_OUTEN_SQWOUT_EN; diff --git a/Libraries/PeriphDrivers/Source/SYS/pins_me30.c b/Libraries/PeriphDrivers/Source/SYS/pins_me30.c index 2b6ae2b03c0..54738a7430f 100644 --- a/Libraries/PeriphDrivers/Source/SYS/pins_me30.c +++ b/Libraries/PeriphDrivers/Source/SYS/pins_me30.c @@ -82,3 +82,8 @@ const mxc_gpio_cfg_t gpio_cfg_spi_ts1 = { MXC_GPIO0, MXC_GPIO_PIN_7, MXC_GPIO_FU MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }; const mxc_gpio_cfg_t gpio_cfg_spi_ts2 = { MXC_GPIO0, MXC_GPIO_PIN_8, MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }; + +// RTC square wave output +const mxc_gpio_cfg_t gpio_cfg_rtcsqw = { MXC_GPIO0, MXC_GPIO_PIN_13, MXC_GPIO_FUNC_ALT1, + MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0}; + From 0556edc915838da4e3a379afe6a4600c1d90f761 Mon Sep 17 00:00:00 2001 From: Kevin Gillespie Date: Wed, 3 Dec 2025 15:42:48 -0600 Subject: [PATCH 2/2] Add MXC_SYS_ClockCalibrate for IPO calibration. --- .../PeriphDrivers/Include/MAX32657/mxc_sys.h | 7 ++++ Libraries/PeriphDrivers/Source/SYS/sys_me30.c | 40 +++++++++++++++++++ 2 files changed, 47 insertions(+) diff --git a/Libraries/PeriphDrivers/Include/MAX32657/mxc_sys.h b/Libraries/PeriphDrivers/Include/MAX32657/mxc_sys.h index 76a3c7922a8..72a29f727f6 100644 --- a/Libraries/PeriphDrivers/Include/MAX32657/mxc_sys.h +++ b/Libraries/PeriphDrivers/Include/MAX32657/mxc_sys.h @@ -390,6 +390,13 @@ void MXC_SYS_StartClockMeasure(mxc_sys_compare_clock_t clock, uint32_t compareCl */ uint32_t MXC_SYS_GetClockMeasure(void); +/** + * @brief Calibrate the specified system clock. Check the microcontroller's UG for more details. + * @param clock Clock source to calibrate. Note usually only the IPO supports calibration. + * @returns E_NO_ERROR if everything is successful. + */ +int MXC_SYS_ClockCalibrate(mxc_sys_system_clock_t clock); + #ifdef __cplusplus } #endif diff --git a/Libraries/PeriphDrivers/Source/SYS/sys_me30.c b/Libraries/PeriphDrivers/Source/SYS/sys_me30.c index 71f7e2a034a..14efa81bd75 100644 --- a/Libraries/PeriphDrivers/Source/SYS/sys_me30.c +++ b/Libraries/PeriphDrivers/Source/SYS/sys_me30.c @@ -580,4 +580,44 @@ uint32_t MXC_SYS_ClockMeasure(mxc_sys_compare_clock_t clock, uint32_t compareClo return MXC_SYS_GetClockMeasure(); } +/* ************************************************************************** */ +int MXC_SYS_ClockCalibrate(mxc_sys_system_clock_t clock) +{ + static const int CAL_MS = 10; + /* IPO_FREQ / ERTCOCC_FREQ, integer divide, rounded */ + static const int AUTOCAL2_DIV = (IPO_FREQ + (ERTCO_FREQ - 1)) / ERTCO_FREQ; + int err; + + /* Only the IPO supports calibration */ + if (clock != MXC_SYS_CLOCK_IPO) { + return E_BAD_PARAM; + } + + /* Make sure the ERTCO is enabled */ + if ((err = MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_ERTCO))) { + return err; + } + + /* The following section implements section 4.1.2.1 of the MAX32657 UG */ + MXC_FCR->autocal0 &= ~(MXC_F_FCR_AUTOCAL0_EN); + MXC_SETFIELD(MXC_FCR->autocal2, MXC_F_FCR_AUTOCAL2_DIV, + AUTOCAL2_DIV << MXC_F_FCR_AUTOCAL2_DIV_POS); + MXC_SETFIELD(MXC_FCR->autocal2, MXC_F_FCR_AUTOCAL2_RUNTIME, + CAL_MS << MXC_F_FCR_AUTOCAL2_RUNTIME_POS); + MXC_SETFIELD(MXC_FCR->autocal1, MXC_F_FCR_AUTOCAL1_INIT_TRIM, + 0x64 << MXC_F_FCR_AUTOCAL1_INIT_TRIM_POS); + MXC_SETFIELD(MXC_FCR->autocal0, MXC_F_FCR_AUTOCAL0_MU, 4 << MXC_F_FCR_AUTOCAL0_MU_POS); + MXC_FCR->autocal0 |= MXC_F_FCR_AUTOCAL0_LOAD_TRIM | MXC_F_FCR_AUTOCAL0_EN | + MXC_F_FCR_AUTOCAL0_RUN; + + MXC_Delay(MXC_DELAY_MSEC(CAL_MS)); + + /* Leaving the calibration hardware running will result in a more accurate frequency on average. + * Trim trim settings will oscillate around the ideal frequency. + */ + MXC_FCR->autocal0 &= ~(MXC_F_FCR_AUTOCAL0_RUN); + + return E_NO_ERROR; +} + /**@} end of mxc_sys */