Please help with compiling for m3 2.2b board.

[dabonetn]

I've been going around and around trying to get this working with a 2.2b for the m3.

The esp module I used is a ESP32-DevKitC-VE, with 8mb psram and 8mb flash.
I'm using the 4.4.7 environment.

using the standard make BOARD=trs-io-m3 build command builds but serial debug shows the following error.

E (1892) spi_flash: Detected size(8192k) smaller than the size in the binary image header(16384k). Probe failed.

Changing the flash size to 8mb, I get the following error.

D (3009) esp_netif_lwip: call api in lwip: ret=0x0, give sem
I (3009) wifi:Set ps type: 0

D (3017) esp_netif_handlers: esp_netif action has started with netif0x3ffc87dc from event_id=2
D (3026) esp_netif_lwip: check: remote, if=0x3ffc87dc fn=0x40121ea8

D (3033) esp_netif_lwip: esp_netifGuru Meditation Error: Core 0 panic'ed (StoreProhibited). Exception was unhandled.

Core 0 register dump:
PC : 0x400973dd PS : 0x00060930 A0 : 0x800978f8 A1 : 0x3ffca060
A2 : 0xffffffff A3 : 0x000001ff A4 : 0x00000000 A5 : 0x3f819270
A6 : 0x00000001 A7 : 0x3f823ef8 A8 : 0x00000018 A9 : 0xfffffff8
A10 : 0x3f823f7a A11 : 0x00060923 A12 : 0x00060920 A13 : 0x3ffca0f8
A14 : 0x007b1a5c A15 : 0x003fffff SAR : 0x00000000 EXCCAUSE: 0x0000001d
EXCVADDR: 0x000002b7 LBEG : 0x4008cdf0 LEND : 0x4008ce0c LCOUNT : 0xffffffff

Backtrace: 0x400973da:0x3ffca060 0x400978f5:0x3ffca0b0 0x4009b6c1:0x3ffca0d0 0x40099514:0x3ffca0f0 0x40093701:0x3ffca120

Changing the watchdog from 5 to 15 seconds allows me to get into the web page and config, and I can connected up to my wifi access point, but then I get another watchdog... on the IO. So the TRS80 never gets a response from the TRS-IO

Backtrace: 0x40117DAE:0x3FFB0B90 0x40083095:0x3FFB0BB0 0x401A3327:0x3FFD4D00 0x400D4BAE:0x3FFD4D20 0x4008B8E9:0x3FFD4D40 0x4008DA0D:0x3FFD4D60

E (61283) task_wdt: Print CPU 1 backtrace

Backtrace: 0x4008647D:0x3FFB1190 0x40083095:0x3FFB11B0 0x40083571:0x3FFECBF0 0x4008DA0D:0x3FFECC10

E (76283) task_wdt: Task watchdog got triggered. The following tasks did not reset the watchdog in time:
E (76283) task_wdt: - IDLE1 (CPU 1)
E (76283) task_wdt: Tasks currently running:
E (76283) task_wdt: CPU 0: IDLE0
E (76283) task_wdt: CPU 1: io
E (76283) task_wdt: Print CPU 0 (current core) backtrace

I've tried a regular Wroom32D module, (Fails due to no psram)
and now the ESP32-DevKitC-VE straight from ESPRESSIF, (Has 8mb PSram and 8MB Flash)

I've seen no 30 or 38 pin modules with the psram and 16mb flash available.

Has anyone gotten the current code base to compile and work on a m3 2.2b board?

Does anyone have a link to a known working esp32 module in the correct footprint?
(The N16r8 has the specs, but comes in a 44 pin board)
(I did find 1 38 pin N16r8 module on Aliexpress, but it has a very different pinout)

[dabonetn]

I started digging into the old discord messages, and saw the non psram build notes.
So I made the following changes to the current source.

I changed sdkconfig.trs-io-m3 to add the following.

Code:

CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y
CONFIG_SPIRAM_SUPPORT=n

Then in the TRS-IO/src/esp/components/trs-fs/posix.cpp file change the max_files=5 to max_files=3.

When I first powered on, it just sat there saying "WAITING ON TRS-IO READY"
I walked away for a bit, and was greeted with the frehd screen..

I had a Hi Let Go module that came with a ESP-32D labeled module on it. This module acts likes it's working, but after I setup the wifi, I can see the address thru the serial debug, but can't access it, and the TRS80 never sees it.

But I stuck a ESP32-WROOM-32 module on the HI Let Go board, replacing the ESP-32D module, and it WORKS with the those changes.

sd card access is quick, wifi is BAD and slow using a module with a built in antenna.

So, it you have a 38 pin module with a ESP32-WROOM-32 on it, these should work on the standard boards with no rewiring.

So now I have a answer of which module actually works currently without modification on the M3 v2.2b board.