diff --git a/xxx/Makefile b/xxx/Makefile
new file mode 100644
index 0000000..6570dd7
--- /dev/null
+++ b/xxx/Makefile
@@ -0,0 +1,17 @@
+TARGET = xxx
+
+all: clean $(TARGET)
+
+$(TARGET):
+	smlrcc main.c regs.c -I./include -o $(TARGET)
+
+debug:
+	gdb 	-ex "set architecture i386:intel" \
+		-ex "set disassembly-flavor intel" \
+		-ex "layout asm" -ex "layout regs" \
+		-ex "br *0x80490b0" \
+		-ex "set startup-with-shell off" \
+		./xxx
+
+clean:
+	rm -f $(TARGET)
diff --git a/xxx/dat.h b/xxx/dat.h
new file mode 100644
index 0000000..4f0abee
--- /dev/null
+++ b/xxx/dat.h
@@ -0,0 +1,23 @@
+/**
+ * common data types
+ */
+
+#include <stdint.h>
+
+/* basic types */
+typedef int32_t i32;
+typedef int16_t i16;
+typedef int8_t i8;
+
+typedef uint32_t u32;
+typedef uint16_t u16;
+typedef uint8_t u8;
+
+/* Reg hold processor registers */
+typedef struct {
+        i32 eax, ebx, ecx, edx;
+        i32 eip, ebp, esi, edi;
+        i32 esp;
+
+        i16 cs, ds, es, fs, gs;
+} Reg;
diff --git a/xxx/fns.h b/xxx/fns.h
new file mode 100644
index 0000000..cd73f94
--- /dev/null
+++ b/xxx/fns.h
@@ -0,0 +1,4 @@
+/** function definitions */
+
+void printRegs32(Reg*);
+void printRegs16(Reg*);
diff --git a/xxx/main.c b/xxx/main.c
new file mode 100644
index 0000000..f16a9f9
--- /dev/null
+++ b/xxx/main.c
@@ -0,0 +1,14 @@
+#include <stdio.h>
+#include "dat.h"
+#include "fns.h"
+
+int main() {
+        Reg reg;
+
+        newreg(&reg);
+
+        printRegs32(&reg);
+        printRegs16(&reg);
+
+        return 0;
+}
diff --git a/xxx/regs.c b/xxx/regs.c
new file mode 100644
index 0000000..f316cc2
--- /dev/null
+++ b/xxx/regs.c
@@ -0,0 +1,124 @@
+/**
+ * get register info
+ */
+
+#include <stdint.h>
+#include "dat.h"
+
+#define LSW(r32) (r32 & 0xffff)    /* least significant word */
+#define MSW(r32) (i16(r32 >> 4))   /* most significant word */
+
+void newreg(Reg *reg) {
+        reg->eax = eax();
+        reg->ebx = ebx();
+        reg->ecx = ecx();
+        reg->edx = edx();
+        reg->eip = eip();
+        reg->ebp = ebp();
+        reg->esi = esi();
+        reg->edi = edi();
+
+        reg->esp = esp();
+
+        reg->cs = cs();
+        reg->ds = ds();
+        reg->es = es();
+        reg->fs = fs();
+        reg->gs = gs();
+}
+
+void printRegs32(Reg *reg) {
+        printf("eax=%08x\tesp=%08x\n", reg->eax, 0);
+        printf("ebx=%08x\tebp=%08x\n", reg->ebx, reg->ebp);
+        printf("ecx=%08x\tesi=%08x\n", reg->ecx, reg->esi);
+        printf("edx=%08x\tedi=%08x\n", reg->edx, reg->edi);
+        printf("eip=%08x\n", reg->eip);
+}
+
+void printRegs16(Reg *reg) {
+        printf("ax=%04x\tsp=%04x\n", LSW(reg->eax) , LSW(reg->esp));
+        printf("bx=%04x\tbp=%04x\n", LSW(reg->ebx) , LSW(reg->ebp));
+        printf("cx=%04x\tsi=%04x\n", LSW(reg->ecx) , LSW(reg->esi));
+        printf("dx=%04x\tdi=%04x\n", LSW(reg->edx) , LSW(reg->edi));
+
+        printf("cs=%04x\tds=%04x\n", reg->cs , reg->ds);
+        printf("es=%04x\tfs=%04x\n", reg->es, reg->fs);
+        printf("gs=%04x\n", reg->gs);
+
+}
+
+/* 32bit registers */
+
+i32 eax() {
+        /* by calling convention */
+}
+
+i32 ebx() {
+        asm("mov eax, ebx");
+}
+
+i32 ecx() {
+        asm("mov eax, ecx");
+}
+
+i32 edx() {
+        asm("mov eax, edx");
+}
+
+i32 eip() {
+        asm("call __next\n"
+            "__next: pop eax");
+}
+
+i32 esp() {
+        asm("mov eax, esp");
+}
+
+i32 ebp() {
+        asm("mov eax, ebp");
+}
+
+i32 esi() {
+        asm("mov eax, esi");
+}
+
+i32 edi() {
+        asm("mov eax, edi");
+}
+
+/* 16bit registers */
+i16 ax() {
+        asm("mov bx, ax\n"
+            "xor eax, eax\n"
+            "mov ax, bx");
+}
+
+i16 bx() {
+        asm("xor eax, eax\n"
+            "mov ax, bx");
+}
+
+i16 cs() {
+        asm("xor eax, eax\n"
+            "mov ax, cs");
+}
+
+i16 ds() {
+        asm("xor eax, eax\n"
+            "mov ax, ds");
+}
+
+i16 es() {
+        asm("xor eax, eax\n"
+            "mov ax, es");
+}
+
+i16 fs() {
+        asm("xor eax, eax\n"
+            "mov ax, fs");
+}
+
+i16 gs() {
+        asm("xor eax, eax\n"
+            "mov ax, gs");
+}