diff --git a/.ci/build.py b/.ci/build.py index cb3e00cf6b5..f54668ed982 100644 --- a/.ci/build.py +++ b/.ci/build.py @@ -104,7 +104,37 @@ platforms=["arm"], cxxids=["clang"], build_dir="build/s32k148-threadx-clang", - ) + ), + "integrationtest-posix-freertos": BuildOpTpl( + config_cmd="cmake --preset integrationtest-posix-freertos", + build_cmd="cmake --build --preset integrationtest-posix-freertos", + configs=["Debug", "Release"], + platforms=["linux"], + build_dir="build/integrationtest-posix-freertos", + ), + "integrationtest-posix-threadx": BuildOpTpl( + config_cmd="cmake --preset integrationtest-posix-threadx", + build_cmd="cmake --build --preset integrationtest-posix-threadx", + configs=["Debug", "Release"], + platforms=["linux"], + build_dir="build/integrationtest-posix-threadx", + ), + "integrationtest-s32k148-freertos-gcc": BuildOpTpl( + config_cmd="cmake --preset integrationtest-s32k148-freertos-gcc", + build_cmd="cmake --build --preset integrationtest-s32k148-freertos-gcc", + configs=["Debug", "Release", "RelWithDebInfo"], + platforms=["arm"], + cxxids=["gcc"], + build_dir="build/integrationtest-s32k148-freertos-gcc", + ), + "integrationtest-s32k148-threadx-gcc": BuildOpTpl( + config_cmd="cmake --preset integrationtest-s32k148-threadx-gcc", + build_cmd="cmake --build --preset integrationtest-s32k148-threadx-gcc", + configs=["Debug", "Release", "RelWithDebInfo"], + platforms=["arm"], + cxxids=["gcc"], + build_dir="build/integrationtest-s32k148-threadx-gcc", + ), } diff --git a/.ci/posix_pytest.py b/.ci/posix_pytest.py index 4aaa4a9dc62..1321deeccdc 100644 --- a/.ci/posix_pytest.py +++ b/.ci/posix_pytest.py @@ -19,8 +19,8 @@ def build_reference_app(): def run_pytest(): os.chdir("./test/pyTest") - subprocess.run(["pytest", "-s", "-v", "--target=posix", "--app=freertos"], check=True) - subprocess.run(["pytest", "-s", "-v", "--target=posix", "--app=threadx"], check=True) + subprocess.run(["pytest", "-s", "-v", "--target=posix", "--app=refApp_freertos"], check=True) + subprocess.run(["pytest", "-s", "-v", "--target=posix", "--app=refApp_threadx"], check=True) if __name__ == "__main__": try: diff --git a/.ci/s32k148_pytest.py b/.ci/s32k148_pytest.py index efd652f4af1..0e3180f38c6 100644 --- a/.ci/s32k148_pytest.py +++ b/.ci/s32k148_pytest.py @@ -2,27 +2,36 @@ import os import sys + def run_cmd(cmd, cwd=None): print(f"\n>>> Running: {cmd}", flush=True) subprocess.run(cmd, shell=True, check=True, cwd=cwd) + def main(): target = "s32k148" toolchain = "gcc" cxxstd = "14" matrix = [ - {"app": "freertos", "preset": "s32k148-freertos-gcc"}, - {"app": "threadx", "preset": "s32k148-threadx-gcc"}, + {"app": "refApp_freertos", "preset": "s32k148-freertos-gcc"}, + {"app": "refApp_threadx", "preset": "s32k148-threadx-gcc"}, + { + "app": "intTestApp_freertos", + "preset": "integrationtest-s32k148-freertos-gcc", + }, ] for item in matrix: preset = item["preset"] - run_cmd(f'python3 .ci/build.py --preset "{preset}" --platform "arm" --cxxid "{toolchain}" --cxxstd "{cxxstd}"') + run_cmd( + f'python3 .ci/build.py --preset "{preset}" --platform "arm" --cxxid "{toolchain}" --cxxstd "{cxxstd}"' + ) os.chdir("test/pyTest") for item in matrix: app = item["app"] - run_cmd(f'pytest -s --target={target} --no-restart --app={app}') + run_cmd(f"pytest -s --target={target} --no-restart --app={app}") + if __name__ == "__main__": try: @@ -30,4 +39,3 @@ def main(): except subprocess.CalledProcessError as e: print(f"\nERROR: command failed with exit code {e.returncode}") sys.exit(e.returncode) - diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index f6419c3546c..be9b8196a84 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -8,7 +8,7 @@ jobs: strategy: # max-parallel: 1 matrix: - preset: [ "tests-posix-debug", "tests-posix-release", "tests-s32k1xx-debug", "tests-s32k1xx-release", "posix-freertos", "posix-threadx", "posix-freertos-with-tracing", "posix-rust", "s32k148-freertos-gcc", "s32k148-threadx-gcc", "s32k148-freertos-clang", "s32k148-threadx-clang", "s32k148-rust-gcc" ] + preset: [ "tests-posix-debug", "tests-posix-release", "tests-s32k1xx-debug", "tests-s32k1xx-release", "posix-freertos", "posix-threadx", "posix-freertos-with-tracing", "posix-rust", "s32k148-freertos-gcc", "s32k148-threadx-gcc", "s32k148-freertos-clang", "s32k148-threadx-clang", "s32k148-rust-gcc" , "integrationtest-posix-freertos", "integrationtest-posix-threadx", "integrationtest-s32k148-freertos-gcc", "integrationtest-s32k148-threadx-gcc"] platform: [ "arm", "linux" ] config: [ "Debug", "Release", "RelWithDebInfo" ] cxxid: ["gcc", "clang"] @@ -80,6 +80,24 @@ jobs: - preset: "s32k148-threadx-clang" cxxid: "gcc" + - preset: "integrationtest-posix-freertos" + platform: "arm" + - preset: "integrationtest-posix-threadx" + platform: "arm" + - preset: "integrationtest-posix-freertos" + cxxid: "clang" + - preset: "integrationtest-posix-threadx" + cxxid: "clang" + + - preset: "integrationtest-s32k148-freertos-gcc" + platform: "linux" + - preset: "integrationtest-s32k148-threadx-gcc" + platform: "linux" + - preset: "integrationtest-s32k148-freertos-gcc" + cxxid: "clang" + - preset: "integrationtest-s32k148-threadx-gcc" + cxxid: "clang" + steps: - name: Checkout repository uses: actions/checkout@v4 diff --git a/CMakeLists.txt b/CMakeLists.txt index 8c0c3033b32..d1ede166111 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -26,12 +26,15 @@ set(BUILD_TARGET_RTOS set(BUILD_EXECUTABLE "" - CACHE STRING "Which build to enable: referenceApp, unitTest") + CACHE STRING + "Which build to enable: referenceApp, unitTest, integrationTest") if (BUILD_EXECUTABLE STREQUAL "referenceApp") # no action for referenceApp build elseif (BUILD_EXECUTABLE STREQUAL "unitTest") add_compile_definitions(UNIT_TEST=1) +elseif (BUILD_EXECUTABLE STREQUAL "integrationTest") + add_compile_definitions(INTEGRATION_TEST=1) endif () # Convert target name to lower case to match directory name @@ -39,6 +42,9 @@ string(TOLOWER "${BUILD_TARGET_PLATFORM}" OPENBSW_TARGET) if (BUILD_EXECUTABLE STREQUAL "referenceApp") include(executables/referenceApp/platforms/${OPENBSW_TARGET}/Options.cmake) +elseif (BUILD_EXECUTABLE STREQUAL "integrationTest") + include( + executables/integrationTest/platforms/${OPENBSW_TARGET}/Options.cmake) endif () # Configure async and Rtos libs depending on target rtos. @@ -125,6 +131,16 @@ if (BUILD_EXECUTABLE STREQUAL "referenceApp") endif () endif () +if (BUILD_EXECUTABLE STREQUAL "integrationTest") + set(OPENBSW_APP_DIR "${CMAKE_CURRENT_LIST_DIR}/executables/integrationTest") + if (BUILD_TARGET_PLATFORM STREQUAL "S32K148EVB") + set(OPENBSW_PLATFORM_DIR + "${CMAKE_CURRENT_SOURCE_DIR}/platforms/s32k1xx") + else () + set(OPENBSW_PLATFORM_DIR "${CMAKE_CURRENT_SOURCE_DIR}/platforms/posix") + endif () +endif () + if (BUILD_TRACING) add_compile_definitions(TRACING=1) if (TRACING_BUFFER_SIZE) @@ -206,4 +222,9 @@ elseif (BUILD_EXECUTABLE STREQUAL "referenceApp") target_include_directories(etl BEFORE INTERFACE executables/referenceApp/etl_profile) add_subdirectory(executables/referenceApp) +elseif (BUILD_EXECUTABLE STREQUAL "integrationTest") + target_include_directories( + etl BEFORE INTERFACE executables/integrationTest/etl_profile) + add_subdirectory(executables/integrationTest) + endif () diff --git a/CMakePresets.json b/CMakePresets.json index ec6272009d2..576590e8cd6 100644 --- a/CMakePresets.json +++ b/CMakePresets.json @@ -197,6 +197,68 @@ "CMAKE_CXX_FLAGS_RELWITHDEBINFO": "-g3 -Os -DNDEBUG", "CMAKE_DEFAULT_BUILD_TYPE": "RelWithDebInfo" } + }, + { + "name": "integrationtest-posix-freertos", + "displayName": "Integrationtest POSIX-FREERTOS compliant configuration", + "description": "Configure for POSIX-FREERTOS compliant environment", + "inherits": "_config-base", + "binaryDir": "${sourceDir}/build/${presetName}", + "cacheVariables": { + "BUILD_EXECUTABLE": "integrationTest", + "BUILD_TARGET_PLATFORM": "POSIX", + "BUILD_TARGET_RTOS": "FREERTOS" + } + }, + { + "name": "integrationtest-posix-threadx", + "displayName": "Integrationtest POSIX-THREADX compliant configuration", + "description": "Configure for POSIX-THREADX compliant environment", + "inherits": "_config-base", + "binaryDir": "${sourceDir}/build/${presetName}", + "cacheVariables": { + "BUILD_EXECUTABLE": "integrationTest", + "BUILD_TARGET_PLATFORM": "POSIX", + "BUILD_TARGET_RTOS": "THREADX" + } + }, + { + "name": "integrationtest-s32k148-freertos-gcc", + "generator": "Ninja Multi-Config", + "displayName": "Integrationtest S32K148-FREERTOS configuration (GCC)", + "description": "Configure Integrationtest for S32K148-FREERTOS platform using ARM GCC toolchain", + "inherits": "_config-base", + "toolchainFile": "${sourceDir}/cmake/toolchains/ArmNoneEabi-gcc.cmake", + "binaryDir": "${sourceDir}/build/${presetName}", + "cacheVariables": { + "BUILD_EXECUTABLE": "integrationTest", + "BUILD_TARGET_PLATFORM": "S32K148EVB", + "BUILD_TARGET_RTOS": "FREERTOS", + "CMAKE_ASM_FLAGS_RELWITHDEBINFO": "-g3", + "CMAKE_CONFIGURATION_TYPES": "RelWithDebInfo;Debug;Release", + "CMAKE_C_FLAGS_RELWITHDEBINFO": "-g3 -O2 -DNDEBUG", + "CMAKE_CXX_FLAGS_RELWITHDEBINFO": "-g3 -O2 -DNDEBUG", + "CMAKE_DEFAULT_BUILD_TYPE": "RelWithDebInfo" + } + }, + { + "name": "integrationtest-s32k148-threadx-gcc", + "generator": "Ninja Multi-Config", + "displayName": "Integrationtest S32K148-THREADX configuration (GCC)", + "description": "Configure Integrationtest for S32K148-THREADX platform using ARM GCC toolchain", + "inherits": "_config-base", + "toolchainFile": "${sourceDir}/cmake/toolchains/ArmNoneEabi-gcc.cmake", + "binaryDir": "${sourceDir}/build/${presetName}", + "cacheVariables": { + "BUILD_EXECUTABLE": "integrationTest", + "BUILD_TARGET_PLATFORM": "S32K148EVB", + "BUILD_TARGET_RTOS": "THREADX", + "CMAKE_ASM_FLAGS_RELWITHDEBINFO": "-g3", + "CMAKE_CONFIGURATION_TYPES": "RelWithDebInfo;Debug;Release", + "CMAKE_C_FLAGS_RELWITHDEBINFO": "-g3 -O2 -DNDEBUG", + "CMAKE_CXX_FLAGS_RELWITHDEBINFO": "-g3 -O2 -DNDEBUG", + "CMAKE_DEFAULT_BUILD_TYPE": "RelWithDebInfo" + } } ], "buildPresets": [ @@ -275,6 +337,30 @@ "displayName": "S32K148 ThreadX build (Clang)", "description": "Build reference application for S32K148 platform with Clang (Release by default; for Debug use --config Debug)", "configurePreset": "s32k148-threadx-clang" + }, + { + "name": "integrationtest-posix-freertos", + "displayName": "build integration test for POSIX-FREERTOS", + "description": "Build integration test application for POSIX-compliant environment (Release by default; for Debug use --config Debug)", + "configurePreset": "integrationtest-posix-freertos" + }, + { + "name": "integrationtest-posix-threadx", + "displayName": "build integration test for POSIX-THREADX", + "description": "Build integration test application for POSIX-compliant environment (Release by default; for Debug use --config Debug)", + "configurePreset": "integrationtest-posix-threadx" + }, + { + "name": "integrationtest-s32k148-freertos-gcc", + "displayName": "Build integration test for S32K148-FREERTOS build (GCC)", + "description": "Build integrationtest application for S32K148 platform with GCC (Release by default; for Debug use --config Debug)", + "configurePreset": "integrationtest-s32k148-freertos-gcc" + }, + { + "name": "integrationtest-s32k148-threadx-gcc", + "displayName": "Build integration test for S32K148-THREADX build (GCC)", + "description": "Build integrationtest application for S32K148 platform with GCC (Release by default; for Debug use --config Debug)", + "configurePreset": "integrationtest-s32k148-threadx-gcc" } ], "testPresets": [ diff --git a/executables/integrationTest/CMakeLists.txt b/executables/integrationTest/CMakeLists.txt new file mode 100644 index 00000000000..53c206118e2 --- /dev/null +++ b/executables/integrationTest/CMakeLists.txt @@ -0,0 +1,25 @@ +# Platform configuration should be inherited from parent CMakeLists.txt +if (NOT DEFINED OPENBSW_TARGET) + string(TOLOWER "${BUILD_TARGET_PLATFORM}" OPENBSW_TARGET) +endif () + +add_subdirectory(platforms/${OPENBSW_TARGET}) + +# Configure async and Rtos libs depending on target rtos. +if (BUILD_TARGET_RTOS STREQUAL "FREERTOS") + add_library(asyncPlatform ALIAS asyncFreeRtos) + add_library(osRtos ALIAS freeRtos) + add_library(asyncRtosImpl ALIAS asyncFreeRtosImpl) +elseif (BUILD_TARGET_RTOS STREQUAL "THREADX") + add_library(asyncPlatform ALIAS asyncThreadX) + add_library(osRtos ALIAS threadX) + add_library(asyncRtosImpl ALIAS asyncThreadXImpl) +endif () + +add_subdirectory(application) +add_subdirectory(asyncBinding) +add_subdirectory(asyncCoreConfiguration) +add_subdirectory(consoleCommands) + +# Empty dummy lib for integration test +add_library(commonImpl INTERFACE) diff --git a/executables/integrationTest/README.md b/executables/integrationTest/README.md new file mode 100644 index 00000000000..586b7d1b5a4 --- /dev/null +++ b/executables/integrationTest/README.md @@ -0,0 +1,8 @@ +## Purpose + +As the name suggest integrationTest app is specifically designed for the purpose +of integration test using pytest framework. + +## Overview + +This app has bare minimum functionalities of referenceApp, currently supports PWM pytests. diff --git a/executables/integrationTest/application/CMakeLists.txt b/executables/integrationTest/application/CMakeLists.txt new file mode 100644 index 00000000000..5d1bf34cc52 --- /dev/null +++ b/executables/integrationTest/application/CMakeLists.txt @@ -0,0 +1,40 @@ +add_executable( + app.integrationTest + src/app/app.cpp + src/logger/logger.cpp + src/console/console.cpp + src/systems/RuntimeSystem.cpp + src/systems/SysAdminSystem.cpp + src/main.cpp) + +target_include_directories(app.integrationTest PRIVATE include) + +target_link_libraries( + app.integrationTest + PRIVATE asyncBinding + asyncConsole + bspMcu + etl + lifecycle + consoleCommands + logger + printf + loggerIntegration + main + stdioConsoleInput + osRtos + asyncRtosImpl + util + runtime + bspUart + socBsp) + +set_target_properties(app.integrationTest PROPERTIES SUFFIX ".elf") + +if (TARGET startUp) + get_target_property(LINKER_SCRIPT startUp PROP_LINKER_SCRIPT) + + if (DEFINED LINKER_SCRIPT) + target_link_options(app.integrationTest PRIVATE -T ${LINKER_SCRIPT}) + endif () +endif () diff --git a/executables/integrationTest/application/include/app/app.h b/executables/integrationTest/application/include/app/app.h new file mode 100644 index 00000000000..40c23eb82f6 --- /dev/null +++ b/executables/integrationTest/application/include/app/app.h @@ -0,0 +1,17 @@ +// Copyright 2025 Accenture. + +#pragma once + +#include "lifecycle/StaticBsp.h" +#include + +namespace app +{ +void run(); +} + +namespace platform +{ +extern void platformLifecycleAdd(::lifecycle::LifecycleManager& lifecycleManager, uint8_t level); +extern StaticBsp& getStaticBsp(); +} // namespace platform diff --git a/executables/integrationTest/application/include/console/console.h b/executables/integrationTest/application/include/console/console.h new file mode 100644 index 00000000000..e44dfba682f --- /dev/null +++ b/executables/integrationTest/application/include/console/console.h @@ -0,0 +1,13 @@ +// Copyright 2025 Accenture. + +#pragma once + +namespace console +{ +void enable(); +void disable(); + +void init(); +void run(); + +} // namespace console diff --git a/executables/integrationTest/application/include/logger/logger.h b/executables/integrationTest/application/include/logger/logger.h new file mode 100644 index 00000000000..a7205443cca --- /dev/null +++ b/executables/integrationTest/application/include/logger/logger.h @@ -0,0 +1,11 @@ +// Copyright 2025 Accenture. + +#pragma once + +namespace logger +{ +void init(); +void run(); +void flush(); + +} // namespace logger diff --git a/executables/integrationTest/application/include/systems/RuntimeSystem.h b/executables/integrationTest/application/include/systems/RuntimeSystem.h new file mode 100644 index 00000000000..84ba361a132 --- /dev/null +++ b/executables/integrationTest/application/include/systems/RuntimeSystem.h @@ -0,0 +1,39 @@ +// Copyright 2025 Accenture. + +#pragma once + +#include +#include +#include +#include +#include + +namespace systems +{ + +class RuntimeSystem +: public ::lifecycle::AsyncLifecycleComponent +, private ::async::IRunnable +{ +public: + explicit RuntimeSystem( + ::async::ContextType context, ::async::AsyncBinding::RuntimeMonitorType& runtimeMonitor); + RuntimeSystem(RuntimeSystem const&) = delete; + RuntimeSystem& operator=(RuntimeSystem const&) = delete; + + void init() override; + void run() override; + void shutdown() override; + +private: + void execute() override; + +private: + ::async::ContextType const _context; + ::async::TimeoutType _timeout; + + ::lifecycle::StatisticsCommand _statisticsCommand; + ::console::AsyncCommandWrapper _asyncCommandWrapperForStatisticsCommand; +}; + +} // namespace systems diff --git a/executables/integrationTest/application/include/systems/SysAdminSystem.h b/executables/integrationTest/application/include/systems/SysAdminSystem.h new file mode 100644 index 00000000000..3b0f4ba5536 --- /dev/null +++ b/executables/integrationTest/application/include/systems/SysAdminSystem.h @@ -0,0 +1,39 @@ +// Copyright 2025 Accenture. + +#pragma once + +#include +#include +#include +#include +#include + +namespace systems +{ + +class SysAdminSystem +: public ::lifecycle::AsyncLifecycleComponent +, private ::async::IRunnable +{ +public: + explicit SysAdminSystem( + ::async::ContextType context, ::lifecycle::ILifecycleManager& lifecycleManager); + SysAdminSystem(SysAdminSystem const&) = delete; + SysAdminSystem& operator=(SysAdminSystem const&) = delete; + + void init() override; + void run() override; + void shutdown() override; + +private: + void execute() override; + +private: + ::async::ContextType const _context; + ::async::TimeoutType _timeout; + + ::lifecycle::LifecycleControlCommand _lifecycleControlCommand; + ::console::AsyncCommandWrapper _asyncCommandWrapperForLifecycleControlCommand; +}; + +} // namespace systems diff --git a/executables/integrationTest/application/src/app/app.cpp b/executables/integrationTest/application/src/app/app.cpp new file mode 100644 index 00000000000..f9378d8fb81 --- /dev/null +++ b/executables/integrationTest/application/src/app/app.cpp @@ -0,0 +1,173 @@ +// Copyright 2025 Accenture. + +#include "app/app.h" + +#include "bsp/uart/UartConfig.h" +#include "console/console.h" +#include "logger/logger.h" +#include "reset/softwareSystemReset.h" +#include "systems/RuntimeSystem.h" +#include "systems/SysAdminSystem.h" +#ifdef TRACING +#include "runtime/Tracer.h" +#endif + +#include +#include +#include +#include + +#include + +#include + +namespace app +{ +using bsp::Uart; +using ::util::logger::LIFECYCLE; +using ::util::logger::Logger; + +using AsyncAdapter = ::async::AsyncBinding::AdapterType; +using AsyncRuntimeMonitor = ::async::AsyncBinding::RuntimeMonitorType; +using AsyncContextHook = ::async::AsyncBinding::ContextHookType; + +constexpr size_t MaxNumComponents = 16; +constexpr size_t MaxNumLevels = 5; +constexpr size_t MaxNumComponentsPerLevel = MaxNumComponents; + +using LifecycleManager = ::lifecycle::declare:: + LifecycleManager; + +char const* const isrGroupNames[ISR_GROUP_COUNT] = {"test"}; + +AsyncRuntimeMonitor runtimeMonitor{ + AsyncContextHook::InstanceType::GetNameType::create<&AsyncAdapter::getTaskName>(), + isrGroupNames}; + +LifecycleManager lifecycleManager{ + TASK_SYSADMIN, + ::lifecycle::LifecycleManager::GetTimestampType::create<&getSystemTimeUs32Bit>()}; + +::etl::typed_storage<::systems::RuntimeSystem> runtimeSystem; +::etl::typed_storage<::systems::SysAdminSystem> sysAdminSystem; + +class LifecycleMonitor : private ::lifecycle::ILifecycleListener +{ +public: + explicit LifecycleMonitor(LifecycleManager& manager) { manager.addLifecycleListener(*this); } + + bool isReadyForReset() const { return _isReadyForReset; } + +private: + void lifecycleLevelReached( + uint8_t const level, + ::lifecycle::ILifecycleComponent::Transition::Type const /* transition */) override + { + if (0 == level) + { + _isReadyForReset = true; + } + } + +private: + bool _isReadyForReset = false; +}; + +LifecycleMonitor lifecycleMonitor(lifecycleManager); + +class IdleHandler : private ::async::RunnableType +{ +public: + void init() + { + ::logger::init(); + + ::console::init(); + ::console::enable(); + } + + void start() { ::async::execute(AsyncAdapter::TASK_IDLE, *this); } + +private: + void execute() override + { + ::logger::run(); + ::console::run(); + + if (lifecycleMonitor.isReadyForReset()) + { + shutdown(); + } + else + { + ::async::execute(AsyncAdapter::TASK_IDLE, *this); + } + } + + void shutdown() + { + Logger::info(LIFECYCLE, "Lifecycle shutdown complete"); + ::logger::flush(); + + softwareSystemReset(); + } +}; + +IdleHandler idleHandler; + +void startApp(); + +void staticInit() +{ + Uart::getInstance(Uart::Id::TERMINAL).init(); + Uart::getInstance(Uart::Id::TERMINAL).waitForTxReady(); +} + +void run() +{ + staticInit(); + printf("hello\r\n"); + idleHandler.init(); + AsyncAdapter::run(AsyncAdapter::StartAppFunctionType::create<&startApp>()); +} + +void startApp() +{ +#if TRACING + runtime::Tracer::init(); + runtime::Tracer::start(); +#endif + + /* runlevel 1 */ + ::platform::platformLifecycleAdd(lifecycleManager, 1U); + lifecycleManager.addComponent( + "runtime", runtimeSystem.create(TASK_BACKGROUND, runtimeMonitor), 1U); + + /* runlevel 2 */ + lifecycleManager.addComponent( + "sysadmin", sysAdminSystem.create(TASK_SYSADMIN, lifecycleManager), 2U); + + lifecycleManager.transitionToLevel(MaxNumLevels); + + runtimeMonitor.start(); + idleHandler.start(); +} + +using IdleTask = AsyncAdapter::IdleTask<1024 * 2>; +IdleTask idleTask{"idle"}; + +using TimerTask = AsyncAdapter::TimerTask<1024 * 1>; +TimerTask timerTask{"timer"}; + +using SysadminTask = AsyncAdapter::Task; +SysadminTask sysadminTask{"sysadmin"}; + +using BspTask = AsyncAdapter::Task; +BspTask bspTask{"bsp"}; + +using BackgroundTask = AsyncAdapter::Task; +BackgroundTask backgroundTask{"background"}; + +AsyncContextHook contextHook{runtimeMonitor}; + +} // namespace app diff --git a/executables/integrationTest/application/src/console/console.cpp b/executables/integrationTest/application/src/console/console.cpp new file mode 100644 index 00000000000..5d78a4622b8 --- /dev/null +++ b/executables/integrationTest/application/src/console/console.cpp @@ -0,0 +1,35 @@ +// Copyright 2025 Accenture. + +#include "console/console.h" + +#include +#include + +namespace console +{ +bool enableStdioConsole = false; +bool enableShmemConsole = false; + +::console::StdioConsoleInput stdioConsoleInput(" ", "\r\n"); +::console::AsyncConsole asyncConsole; + +void enable() { enableStdioConsole = true; } + +void disable() { enableStdioConsole = false; } + +void init() +{ + stdioConsoleInput.init( + StdioConsoleInput::OnLineReceived::create( + asyncConsole)); +} + +void run() +{ + if (enableStdioConsole) + { + stdioConsoleInput.run(); + } +} + +} // namespace console diff --git a/executables/integrationTest/application/src/logger/logger.cpp b/executables/integrationTest/application/src/logger/logger.cpp new file mode 100644 index 00000000000..3d07fa347e2 --- /dev/null +++ b/executables/integrationTest/application/src/logger/logger.cpp @@ -0,0 +1,82 @@ +// Copyright 2025 Accenture. + +#include "logger/logger.h" + +/* start: adding logger includes */ + +#include +#include +#include + +/* end: adding logger includes */ + +DEFINE_LOGGER_COMPONENT(BSP); +DEFINE_LOGGER_COMPONENT(COMMON); +DEFINE_LOGGER_COMPONENT(GLOBAL); + +#include +#include +#include +#include +#include +#include + +START_LOGGER_COMPONENT_MAPPING_INFO_TABLE(loggerComponentInfoTable) +/* start: adding logger components */ +LOGGER_COMPONENT_MAPPING_INFO(_DEBUG, BSP, ::util::format::Color::DEFAULT_COLOR) +LOGGER_COMPONENT_MAPPING_INFO(_DEBUG, COMMON, ::util::format::Color::DEFAULT_COLOR) +LOGGER_COMPONENT_MAPPING_INFO(_DEBUG, GLOBAL, ::util::format::Color::DEFAULT_COLOR) +LOGGER_COMPONENT_MAPPING_INFO(_DEBUG, LIFECYCLE, ::util::format::Color::DARK_GRAY) +LOGGER_COMPONENT_MAPPING_INFO(_DEBUG, CONSOLE, ::util::format::Color::DEFAULT_COLOR) +/* end: adding logger components */ +END_LOGGER_COMPONENT_MAPPING_INFO_TABLE(); + +DEFINE_LOGGER_COMPONENT_MAPPING( + LoggerComponentMappingType, + loggerComponentMapping, + loggerComponentInfoTable, + ::util::logger::LevelInfo::getDefaultTable(), + GLOBAL); + +namespace logger +{ +using ComponentConfigType = ComponentConfig; +ComponentConfigType loggerComponentConfig(loggerComponentMapping); +LoggerComposition loggerComposition(loggerComponentMapping, "integrationTest"); + +DefaultLoggerCommand loggerCommand(loggerComponentConfig); +::console::AsyncCommandWrapper + asyncCommandWrapper(loggerCommand.root(), ::async::AsyncBinding::AdapterType::TASK_IDLE); + +void init() +{ + loggerComposition.start( + LoggerComposition::ConfigStart::create( + loggerComponentConfig)); +} + +void run() { loggerComposition.run(); } + +void flush() +{ + loggerComposition.stop( + LoggerComposition::ConfigStop::create( + loggerComponentConfig)); +} + +using ::util::logger::Logger; + +extern "C" void log_lwipInfo(char const* message, ...) +{ + // to print variable argument list + // ToDo: use StringWriter or PrintfFormatter available in util + + static char buffer[100]; + va_list ap; + /* get the varargs */ + va_start(ap, message); + vsnprintf_(buffer, sizeof(buffer), message, ap); + va_end(ap); +} + +} // namespace logger diff --git a/executables/integrationTest/application/src/main.cpp b/executables/integrationTest/application/src/main.cpp new file mode 100644 index 00000000000..1aa7f14825f --- /dev/null +++ b/executables/integrationTest/application/src/main.cpp @@ -0,0 +1,5 @@ +// Copyright 2025 Accenture. + +#include "app/app.h" + +void app_main() { ::app::run(); } diff --git a/executables/integrationTest/application/src/systems/RuntimeSystem.cpp b/executables/integrationTest/application/src/systems/RuntimeSystem.cpp new file mode 100644 index 00000000000..f70daa33733 --- /dev/null +++ b/executables/integrationTest/application/src/systems/RuntimeSystem.cpp @@ -0,0 +1,47 @@ +// Copyright 2025 Accenture. + +#include "systems/RuntimeSystem.h" + +namespace +{ +constexpr uint32_t SYSTEM_CYCLE_TIME = 1000; +} + +namespace systems +{ + +RuntimeSystem::RuntimeSystem( + ::async::ContextType const context, ::async::AsyncBinding::RuntimeMonitorType& runtimeMonitor) +: _context(context) +, _timeout() +, _statisticsCommand(runtimeMonitor) +, _asyncCommandWrapperForStatisticsCommand(_statisticsCommand, context) +{ + setTransitionContext(context); +} + +void RuntimeSystem::init() +{ + _statisticsCommand.setTicksPerUs(0); // use hardware ticks rate + + transitionDone(); +} + +void RuntimeSystem::run() +{ + ::async::scheduleAtFixedRate( + _context, *this, _timeout, SYSTEM_CYCLE_TIME, ::async::TimeUnit::MILLISECONDS); + + transitionDone(); +} + +void RuntimeSystem::shutdown() +{ + _timeout.cancel(); + + transitionDone(); +} + +void RuntimeSystem::execute() { _statisticsCommand.cyclic_1000ms(); } + +} // namespace systems diff --git a/executables/integrationTest/application/src/systems/SysAdminSystem.cpp b/executables/integrationTest/application/src/systems/SysAdminSystem.cpp new file mode 100644 index 00000000000..7371599272a --- /dev/null +++ b/executables/integrationTest/application/src/systems/SysAdminSystem.cpp @@ -0,0 +1,45 @@ +// Copyright 2025 Accenture. + +#include "systems/SysAdminSystem.h" + +namespace +{ +constexpr uint32_t SYSTEM_CYCLE_TIME = 10; +} + +namespace systems +{ + +SysAdminSystem::SysAdminSystem( + ::async::ContextType const context, ::lifecycle::ILifecycleManager& lifecycleManager) +: _context(context) +, _timeout() +, _lifecycleControlCommand(lifecycleManager) +, _asyncCommandWrapperForLifecycleControlCommand(_lifecycleControlCommand, context) +{ + setTransitionContext(context); +} + +void SysAdminSystem::init() { transitionDone(); } + +void SysAdminSystem::run() +{ + ::async::scheduleAtFixedRate( + _context, *this, _timeout, SYSTEM_CYCLE_TIME, ::async::TimeUnit::MILLISECONDS); + + transitionDone(); +} + +void SysAdminSystem::shutdown() +{ + _timeout.cancel(); + + transitionDone(); +} + +void SysAdminSystem::execute() +{ + // +} + +} // namespace systems diff --git a/executables/integrationTest/asyncBinding/CMakeLists.txt b/executables/integrationTest/asyncBinding/CMakeLists.txt new file mode 100644 index 00000000000..bed02d1b6b9 --- /dev/null +++ b/executables/integrationTest/asyncBinding/CMakeLists.txt @@ -0,0 +1,12 @@ +add_library(asyncBinding INTERFACE) + +# Configure asyncBinding depending on selected target rtos. +if (BUILD_TARGET_RTOS STREQUAL "FREERTOS") + target_compile_definitions(asyncBinding INTERFACE SUPPORT_FREERTOS) +elseif (BUILD_TARGET_RTOS STREQUAL "THREADX") + target_compile_definitions(asyncBinding INTERFACE SUPPORT_THREADX) +endif () + +target_include_directories(asyncBinding INTERFACE include) + +target_link_libraries(asyncBinding INTERFACE runtime) diff --git a/executables/integrationTest/asyncBinding/include/async/AsyncBinding.h b/executables/integrationTest/asyncBinding/include/async/AsyncBinding.h new file mode 100644 index 00000000000..ae5cab2c9d6 --- /dev/null +++ b/executables/integrationTest/asyncBinding/include/async/AsyncBinding.h @@ -0,0 +1,40 @@ +// Copyright 2024 Accenture. + +#pragma once + +#include +#include +#include +#include + +#include + +#if defined(SUPPORT_FREERTOS) +#include +#elif defined(SUPPORT_THREADX) +#include +#endif + +namespace async +{ +struct AsyncBinding : public Config +{ + static size_t const WAIT_EVENTS_TICK_COUNT = 100U; + +#if defined(SUPPORT_FREERTOS) + using AdapterType = FreeRtosAdapter; +#elif defined(SUPPORT_THREADX) + using AdapterType = ThreadXAdapter; +#endif + + using RuntimeMonitorType = ::runtime::declare::RuntimeMonitor< + ::runtime::RuntimeStatistics, + ::runtime::RuntimeStatistics, + AdapterType::OS_TASK_COUNT, + ISR_GROUP_COUNT>; + + using ContextHookType = StaticContextHook; +}; + +using AsyncBindingType = AsyncBinding; +} // namespace async diff --git a/executables/integrationTest/asyncBinding/module.spec b/executables/integrationTest/asyncBinding/module.spec new file mode 100644 index 00000000000..87faef85b71 --- /dev/null +++ b/executables/integrationTest/asyncBinding/module.spec @@ -0,0 +1 @@ +oss: true diff --git a/executables/integrationTest/asyncCoreConfiguration/CMakeLists.txt b/executables/integrationTest/asyncCoreConfiguration/CMakeLists.txt new file mode 100644 index 00000000000..89a98e48d05 --- /dev/null +++ b/executables/integrationTest/asyncCoreConfiguration/CMakeLists.txt @@ -0,0 +1,3 @@ +add_library(asyncCoreConfiguration INTERFACE) + +target_include_directories(asyncCoreConfiguration INTERFACE include) diff --git a/executables/integrationTest/asyncCoreConfiguration/include/async/Config.h b/executables/integrationTest/asyncCoreConfiguration/include/async/Config.h new file mode 100644 index 00000000000..8252a831da8 --- /dev/null +++ b/executables/integrationTest/asyncCoreConfiguration/include/async/Config.h @@ -0,0 +1,43 @@ +// Copyright 2025 Accenture. + +#pragma once + +// NOTE: This file needs to be implemented in C as it ends up being part of FreeRTOSConfig.h +#define ASYNC_CONFIG_TICK_IN_US (1000U) // System tick interval in microseconds. + +/** + * There are two implicit contexts/tasks: One is TASK_IDLE with the value 0 and the other is + * TASK_TIMER with its value equal to ASYNC_CONFIG_TASK_COUNT. This implies that the actual number + * of tasks in the system is not equal to ASYNC_CONFIG_TASK_COUNT but to ASYNC_CONFIG_TASK_COUNT+1. + * And don't forget about the fact that we start counting at 1 here. To sum it up: If there are 3 + * entries in this enum, there are actually 5 tasks in the system. + * See asyncFreeRtos/include/async/FreeRtosAdapter.h + */ + +#ifndef __ASSEMBLER__ + +/** + * Tasks for different operations are defined here. + */ +enum +{ + // TASK_IDLE = 0 + TASK_BACKGROUND = 1, + TASK_BSP, + TASK_SYSADMIN, + // TASK_TIMER, + // -------------------- + ASYNC_CONFIG_TASK_COUNT, +}; + +/** + * Groups for related interrupts are defined here. + */ +enum +{ + ISR_GROUP_TEST = 0, + // ------------ + ISR_GROUP_COUNT, +}; + +#endif // __ASSEMBLER__ diff --git a/executables/integrationTest/asyncCoreConfiguration/module.spec b/executables/integrationTest/asyncCoreConfiguration/module.spec new file mode 100644 index 00000000000..87faef85b71 --- /dev/null +++ b/executables/integrationTest/asyncCoreConfiguration/module.spec @@ -0,0 +1 @@ +oss: true diff --git a/executables/integrationTest/consoleCommands/CMakeLists.txt b/executables/integrationTest/consoleCommands/CMakeLists.txt new file mode 100644 index 00000000000..8d003825b3e --- /dev/null +++ b/executables/integrationTest/consoleCommands/CMakeLists.txt @@ -0,0 +1,16 @@ +set(consoleCommands_SOURCES) +list(APPEND consoleCommands_SOURCES + src/lifecycle/console/LifecycleControlCommand.cpp + src/lifecycle/console/StatisticsCommand.cpp) + +add_library(consoleCommands ${consoleCommands_SOURCES}) + +target_include_directories(consoleCommands PUBLIC include) + +target_link_libraries( + consoleCommands + PUBLIC lifecycle + asyncBinding + asyncCoreConfiguration + runtime + cpp2can) diff --git a/executables/integrationTest/consoleCommands/include/lifecycle/console/LifecycleControlCommand.h b/executables/integrationTest/consoleCommands/include/lifecycle/console/LifecycleControlCommand.h new file mode 100644 index 00000000000..e61ada2343d --- /dev/null +++ b/executables/integrationTest/consoleCommands/include/lifecycle/console/LifecycleControlCommand.h @@ -0,0 +1,28 @@ +// Copyright 2025 Accenture. + +#pragma once + +#include + +namespace lifecycle +{ +class ILifecycleManager; +} + +namespace lifecycle +{ + +class LifecycleControlCommand : public ::util::command::GroupCommand +{ +public: + LifecycleControlCommand(ILifecycleManager& lifecycleManager); + +protected: + DECLARE_COMMAND_GROUP_GET_INFO + void executeCommand(::util::command::CommandContext& context, uint8_t idx) override; + +private: + ILifecycleManager& _lifecycleManager; +}; + +} // namespace lifecycle diff --git a/executables/integrationTest/consoleCommands/include/lifecycle/console/StatisticsCommand.h b/executables/integrationTest/consoleCommands/include/lifecycle/console/StatisticsCommand.h new file mode 100644 index 00000000000..ccb67936f94 --- /dev/null +++ b/executables/integrationTest/consoleCommands/include/lifecycle/console/StatisticsCommand.h @@ -0,0 +1,41 @@ +// Copyright 2024 Accenture. + +#pragma once + +#include +#include +#include +#include + +namespace lifecycle +{ +class StatisticsCommand : public ::util::command::GroupCommand +{ +public: + StatisticsCommand(::async::AsyncBinding::RuntimeMonitorType& runtimeMonitor); + + void setTicksPerUs(uint32_t ticksPerUs); + void cyclic_1000ms(); + +protected: + DECLARE_COMMAND_GROUP_GET_INFO + void executeCommand(::util::command::CommandContext& context, uint8_t idx) override; + +private: + using TaskStatistics = ::runtime::declare::StatisticsContainer< + ::runtime::RuntimeStatistics, + ::async::AsyncBindingType::AdapterType::OS_TASK_COUNT>; + + using IsrGroupStatistics + = ::runtime::declare::StatisticsContainer<::runtime::RuntimeStatistics, ISR_GROUP_COUNT>; + + ::async::AsyncBinding::RuntimeMonitorType& _runtimeMonitor; + + TaskStatistics _taskStatistics; + IsrGroupStatistics _isrGroupStatistics; + + ::etl::optional _ticksPerUs; + uint32_t _totalRuntime; +}; + +} // namespace lifecycle diff --git a/executables/integrationTest/consoleCommands/module.spec b/executables/integrationTest/consoleCommands/module.spec new file mode 100644 index 00000000000..87faef85b71 --- /dev/null +++ b/executables/integrationTest/consoleCommands/module.spec @@ -0,0 +1 @@ +oss: true diff --git a/executables/integrationTest/consoleCommands/src/lifecycle/console/LifecycleControlCommand.cpp b/executables/integrationTest/consoleCommands/src/lifecycle/console/LifecycleControlCommand.cpp new file mode 100644 index 00000000000..3dd698b399f --- /dev/null +++ b/executables/integrationTest/consoleCommands/src/lifecycle/console/LifecycleControlCommand.cpp @@ -0,0 +1,93 @@ +// Copyright 2025 Accenture. + +#include "lifecycle/console/LifecycleControlCommand.h" + +#include +#include + +#include + +namespace +{ +enum Id +{ + ID_REBOOT, + ID_POWEROFF, + GO_TO_LEVEL, + ID_UDEF, + ID_PABT, + ID_DABT, + ID_ASSERT +}; + +} + +namespace lifecycle +{ +DEFINE_COMMAND_GROUP_GET_INFO_BEGIN(LifecycleControlCommand, "lc", "lifecycle command") +COMMAND_GROUP_COMMAND(ID_REBOOT, "reboot", "reboot the system") +COMMAND_GROUP_COMMAND(ID_POWEROFF, "poweroff", "poweroff the system") +COMMAND_GROUP_COMMAND(GO_TO_LEVEL, "level", "switch to level") +COMMAND_GROUP_COMMAND(ID_UDEF, "udef", "forces an undefined instruction exception") +COMMAND_GROUP_COMMAND(ID_PABT, "pabt", "forces a prefetch abort exception") +COMMAND_GROUP_COMMAND(ID_DABT, "dabt", "forces a data abort exception") +COMMAND_GROUP_COMMAND(ID_ASSERT, "assert", "forces an assert") +DEFINE_COMMAND_GROUP_GET_INFO_END + +LifecycleControlCommand::LifecycleControlCommand(ILifecycleManager& lifecycleManager) +: _lifecycleManager(lifecycleManager) +{} + +void LifecycleControlCommand::executeCommand(::util::command::CommandContext& context, uint8_t idx) +{ + switch (idx) + { + case ID_REBOOT: + { + _lifecycleManager.transitionToLevel(0); + break; + } + case ID_POWEROFF: + { + _lifecycleManager.transitionToLevel(0); + break; + } + case GO_TO_LEVEL: + { + uint8_t level = context.scanIntToken(); + if (level <= _lifecycleManager.getLevelCount()) + { + _lifecycleManager.transitionToLevel(level); + } + else + { + context.check(false); + return; + } + break; + } + case ID_UDEF: + { + break; + } + case ID_PABT: + { + break; + } + case ID_DABT: + { + break; + } + case ID_ASSERT: + { + ETL_ASSERT_FAIL(ETL_ERROR_GENERIC("requested assert")); + break; + } + default: + { + break; + } + } +} + +} // namespace lifecycle diff --git a/executables/integrationTest/consoleCommands/src/lifecycle/console/StatisticsCommand.cpp b/executables/integrationTest/consoleCommands/src/lifecycle/console/StatisticsCommand.cpp new file mode 100644 index 00000000000..29effbaf6ab --- /dev/null +++ b/executables/integrationTest/consoleCommands/src/lifecycle/console/StatisticsCommand.cpp @@ -0,0 +1,140 @@ +// Copyright 2025 Accenture. + +#include "lifecycle/console/StatisticsCommand.h" + +#include +#include +#include + +namespace +{ +void format( + ::runtime::StatisticsWriter& statisticsWriter, ::runtime::RuntimeStatistics const& statistics) +{ + statisticsWriter.writeRuntimePercentage("%", statistics.getTotalRuntime()); + statisticsWriter.writeRuntimeMS("total ", 9U, statistics.getTotalRuntime()); + statisticsWriter.writeNumber("runs ", 6U, statistics.getTotalRunCount()); + statisticsWriter.writeRuntime("avg ", 6U, statistics.getAverageRuntime()); + statisticsWriter.writeRuntime("min ", 6U, statistics.getMinRuntime()); + statisticsWriter.writeRuntime("max ", 6U, statistics.getMaxRuntime()); +} + +template +void printCpu( + ::util::command::CommandContext& context, + T const& taskStatistics, + I const& isrGroupStatistics, + ::etl::optional const& ticksPerUs, + uint32_t const totalRuntime) +{ + ::util::format::SharedStringWriter writer(context); + + if (!ticksPerUs.has_value()) + { + writer.printf("cannot print CPU statistics, ticksPerUs is unknown\n"); + return; + } + + ::runtime::StatisticsWriter statisticsWriter(writer, totalRuntime, *ticksPerUs); + + typedef ::runtime::StatisticsWriter::FormatStatistics<::runtime::RuntimeStatistics>::Type + FormatStatisticsType; + + FormatStatisticsType formatStatistics = FormatStatisticsType::create<&format>(); + + statisticsWriter.formatStatisticsGroup( + formatStatistics, "task", 15U, taskStatistics.getIterator()); + + statisticsWriter.writeEol(); + + statisticsWriter.formatStatisticsGroup( + formatStatistics, "isr group", 15U, isrGroupStatistics.getIterator()); + + statisticsWriter.writeEol(); + + writer.write("measurement time: "); + + statisticsWriter.writeRuntime("", 8U, totalRuntime); +} + +void printStack( + ::util::command::CommandContext& context, + ::async::AsyncBinding::RuntimeMonitorType& /* runtimeMonitor */) +{ + ::util::format::SharedStringWriter writer(context); + + for (size_t i = 0; i <= ASYNC_CONFIG_TASK_COUNT; ++i) + { + using at = ::async::AsyncBindingType::AdapterType; + char const* const name = at::getTaskName(i); + at::StackUsage stackUsage; + at::getStackUsage(i, stackUsage); + + writer.printf( + "stack:task=%s,size=%d,used=%d\n", name, stackUsage._stackSize, stackUsage._usedSize); + } +} + +enum Id +{ + ID_CPU, + ID_STACK, + ID_ALL +}; + +} // namespace + +namespace lifecycle +{ +DEFINE_COMMAND_GROUP_GET_INFO_BEGIN(StatisticsCommand, "stats", "lifecycle statistics command") +COMMAND_GROUP_COMMAND(ID_CPU, "cpu", "prints CPU statistics") +COMMAND_GROUP_COMMAND(ID_STACK, "stack", "prints stack statistics") +COMMAND_GROUP_COMMAND(ID_ALL, "all", "prints all statistics") +DEFINE_COMMAND_GROUP_GET_INFO_END + +StatisticsCommand::StatisticsCommand(::async::AsyncBinding::RuntimeMonitorType& runtimeMonitor) +: _runtimeMonitor(runtimeMonitor) +, _taskStatistics() +, _isrGroupStatistics() +, _ticksPerUs() +, _totalRuntime(0) +{} + +void StatisticsCommand::setTicksPerUs(uint32_t const ticksPerUs) { _ticksPerUs = ticksPerUs; } + +void StatisticsCommand::cyclic_1000ms() +{ + ::async::Lock const lock; + _taskStatistics.copyFrom(_runtimeMonitor.getTaskStatistics()); + _isrGroupStatistics.copyFrom(_runtimeMonitor.getIsrGroupStatistics()); + _totalRuntime = _runtimeMonitor.reset(); +} + +void StatisticsCommand::executeCommand(::util::command::CommandContext& context, uint8_t idx) +{ + switch (idx) + { + case ID_CPU: + { + printCpu(context, _taskStatistics, _isrGroupStatistics, _ticksPerUs, _totalRuntime); + break; + } + case ID_STACK: + { + printStack(context, _runtimeMonitor); + break; + } + case ID_ALL: + { + printCpu(context, _taskStatistics, _isrGroupStatistics, _ticksPerUs, _totalRuntime); + printStack(context, _runtimeMonitor); + break; + } + default: + { + break; + } + } +} + +} // namespace lifecycle diff --git a/executables/integrationTest/etl_profile/etl_profile.h b/executables/integrationTest/etl_profile/etl_profile.h new file mode 100644 index 00000000000..7c8a66158bf --- /dev/null +++ b/executables/integrationTest/etl_profile/etl_profile.h @@ -0,0 +1,29 @@ +// Copyright 2025 Accenture. + +#ifndef ETL_PROFILE_H +#define ETL_PROFILE_H + +#define ETL_TARGET_DEVICE_GENERIC +#define ETL_TARGET_OS_NONE + +#define ETL_NO_STL + +// When using clang, the headers are using the std::initializer_list and +// std::tuple (tuple_size) definitions even though we are configuring +// ETL_NO_STL in general +#include +#include + +#define ETL_FORCE_STD_INITIALIZER_LIST + +#define ETL_NO_LIBC_WCHAR_H + +#define ETL_USING_BUILTIN_MEMCPY 0 +#define ETL_USING_BUILTIN_MEMMOVE 0 +#define ETL_USING_BUILTIN_MEMSET 0 +#define ETL_USING_BUILTIN_MEMCMP 0 +#define ETL_USING_BUILTIN_MEMCHR 0 + +#define ETL_USE_ASSERT_FUNCTION + +#endif // ETL_PROFILE_H diff --git a/executables/integrationTest/platforms/posix/CMakeLists.txt b/executables/integrationTest/platforms/posix/CMakeLists.txt new file mode 100644 index 00000000000..84e616cd789 --- /dev/null +++ b/executables/integrationTest/platforms/posix/CMakeLists.txt @@ -0,0 +1,12 @@ +add_subdirectory(bspConfiguration) +add_subdirectory(main) + +if (BUILD_TARGET_RTOS STREQUAL "FREERTOS") + add_subdirectory(freeRtosCoreConfiguration) + add_library(freeRtosPort ALIAS freeRtosPosixPort) + add_library(freeRtosPortImpl ALIAS freeRtosPosix) +elseif (BUILD_TARGET_RTOS STREQUAL "THREADX") + add_subdirectory(threadXCoreConfiguration) + add_library(threadXPort ALIAS threadXLinuxPort) + add_library(threadXPortImpl ALIAS threadXLinux) +endif () diff --git a/executables/integrationTest/platforms/posix/Options.cmake b/executables/integrationTest/platforms/posix/Options.cmake new file mode 100644 index 00000000000..218c15ea168 --- /dev/null +++ b/executables/integrationTest/platforms/posix/Options.cmake @@ -0,0 +1,7 @@ +set(OPENBSW_PLATFORM posix) + +if (NOT CMAKE_SYSTEM_NAME OR NOT CMAKE_SYSTEM_NAME MATCHES "Darwin") + set(PLATFORM_SUPPORT_IO + OFF + CACHE BOOL "Turn IO support on or off" FORCE) +endif () diff --git a/executables/integrationTest/platforms/posix/bspConfiguration/CMakeLists.txt b/executables/integrationTest/platforms/posix/bspConfiguration/CMakeLists.txt new file mode 100644 index 00000000000..be0bb36658c --- /dev/null +++ b/executables/integrationTest/platforms/posix/bspConfiguration/CMakeLists.txt @@ -0,0 +1,17 @@ +add_library(bspConfiguration INTERFACE) + +# Make EEPROM filepath configurable via CMake. Use a CACHE STRING (not option) +# so users can set an arbitrary path string via -D +set(BSP_EEPROM_FILEPATH + "/tmp/openbsw_posix_eeprom.bin" + CACHE STRING "Path to POSIX EEPROM file") + +# Generate a header with the configured EEPROM file path into the build +# directory so consumers get the configured value first on the include path. +configure_file(${CMAKE_CURRENT_SOURCE_DIR}/EepromConfiguration.h.in + ${CMAKE_CURRENT_BINARY_DIR}/EepromConfiguration.h @ONLY) + +target_include_directories( + bspConfiguration + INTERFACE $ + $) diff --git a/executables/integrationTest/platforms/posix/bspConfiguration/EepromConfiguration.h.in b/executables/integrationTest/platforms/posix/bspConfiguration/EepromConfiguration.h.in new file mode 100644 index 00000000000..ad155aca722 --- /dev/null +++ b/executables/integrationTest/platforms/posix/bspConfiguration/EepromConfiguration.h.in @@ -0,0 +1,5 @@ +// Copyright 2025 Accenture. + +#pragma once + +#define EEPROM_FILEPATH "@BSP_EEPROM_FILEPATH@" diff --git a/executables/integrationTest/platforms/posix/bspConfiguration/include/bsp/EepromConfiguration.h b/executables/integrationTest/platforms/posix/bspConfiguration/include/bsp/EepromConfiguration.h new file mode 100644 index 00000000000..3f899eb5b9d --- /dev/null +++ b/executables/integrationTest/platforms/posix/bspConfiguration/include/bsp/EepromConfiguration.h @@ -0,0 +1,5 @@ +// Copyright 2025 Accenture. + +#pragma once + +#define EEPROM_FILEPATH "/tmp/openbsw_posix_eeprom.bin" diff --git a/executables/integrationTest/platforms/posix/bspConfiguration/include/bsp/uart/UartConfig.h b/executables/integrationTest/platforms/posix/bspConfiguration/include/bsp/uart/UartConfig.h new file mode 100644 index 00000000000..cd51c191164 --- /dev/null +++ b/executables/integrationTest/platforms/posix/bspConfiguration/include/bsp/uart/UartConfig.h @@ -0,0 +1,20 @@ +// Copyright 2025 BMW AG + +#pragma once + +#include "bsp/Uart.h" +#include +#include + +namespace bsp +{ + +enum class Uart::Id : size_t +{ + TERMINAL, + INVALID, +}; + +static constexpr size_t NUMBER_OF_UARTS = static_cast(Uart::Id::INVALID); + +} // namespace bsp diff --git a/executables/integrationTest/platforms/posix/bspConfiguration/module.spec b/executables/integrationTest/platforms/posix/bspConfiguration/module.spec new file mode 100644 index 00000000000..f75191894b2 --- /dev/null +++ b/executables/integrationTest/platforms/posix/bspConfiguration/module.spec @@ -0,0 +1 @@ +oss: true \ No newline at end of file diff --git a/executables/integrationTest/platforms/posix/freeRtosCoreConfiguration/CMakeLists.txt b/executables/integrationTest/platforms/posix/freeRtosCoreConfiguration/CMakeLists.txt new file mode 100644 index 00000000000..6075d62b077 --- /dev/null +++ b/executables/integrationTest/platforms/posix/freeRtosCoreConfiguration/CMakeLists.txt @@ -0,0 +1,3 @@ +add_library(freeRtosCoreConfiguration INTERFACE) + +target_include_directories(freeRtosCoreConfiguration INTERFACE include) diff --git a/executables/integrationTest/platforms/posix/freeRtosCoreConfiguration/include/os/FreeRtosPlatformConfig.h b/executables/integrationTest/platforms/posix/freeRtosCoreConfiguration/include/os/FreeRtosPlatformConfig.h new file mode 100644 index 00000000000..630c00161b0 --- /dev/null +++ b/executables/integrationTest/platforms/posix/freeRtosCoreConfiguration/include/os/FreeRtosPlatformConfig.h @@ -0,0 +1,27 @@ +// Copyright 2025 Accenture. + +#pragma once + +#ifdef __cplusplus +extern "C" +{ +#endif + +#define INCLUDE_uxTaskPriorityGet (1) +#undef configCHECK_FOR_STACK_OVERFLOW +#define configCHECK_FOR_STACK_OVERFLOW 2 // change from 1 in order to watermark check boundaries + +#ifndef MINIMUM_STACK_SIZE +#define EXTRA_THREAD_DATA_STACK_SIZE 40U // see pxPortInitialiseStack() +#if (defined(_DYNAMIC_STACK_SIZE_SOURCE)) || (defined(_GNU_SOURCE)) +// the library may not give a compile time value; a workaround is provided +#define MINIMUM_STACK_SIZE (16384U + EXTRA_THREAD_DATA_STACK_SIZE) +#else // _DYNAMIC_STACK_SIZE_SOURCE +#include +#define MINIMUM_STACK_SIZE ((PTHREAD_STACK_MIN) + EXTRA_THREAD_DATA_STACK_SIZE) +#endif // _DYNAMIC_STACK_SIZE_SOURCE +#endif // MINIMUM_STACK_SIZE + +#ifdef __cplusplus +} /* extern "C" */ +#endif diff --git a/executables/integrationTest/platforms/posix/freeRtosCoreConfiguration/module.spec b/executables/integrationTest/platforms/posix/freeRtosCoreConfiguration/module.spec new file mode 100644 index 00000000000..87faef85b71 --- /dev/null +++ b/executables/integrationTest/platforms/posix/freeRtosCoreConfiguration/module.spec @@ -0,0 +1 @@ +oss: true diff --git a/executables/integrationTest/platforms/posix/main/CMakeLists.txt b/executables/integrationTest/platforms/posix/main/CMakeLists.txt new file mode 100644 index 00000000000..e8063615379 --- /dev/null +++ b/executables/integrationTest/platforms/posix/main/CMakeLists.txt @@ -0,0 +1,16 @@ +add_library(main src/main.cpp src/lifecycle/StaticBsp.cpp) + +target_include_directories(main PUBLIC include) + +target_link_libraries( + main + PRIVATE bspUart asyncBinding lifecycle + PUBLIC bspEepromDriver) + +if (BUILD_TARGET_RTOS STREQUAL "FREERTOS") + add_library(osHooks src/osHooks/freertos/osHooks.cpp) + target_link_libraries(osHooks PRIVATE freeRtos) +elseif (BUILD_TARGET_RTOS STREQUAL "THREADX") + add_library(osHooks src/osHooks/threadx/osHooks.cpp) + target_link_libraries(osHooks PRIVATE threadX) +endif () diff --git a/executables/integrationTest/platforms/posix/main/include/lifecycle/StaticBsp.h b/executables/integrationTest/platforms/posix/main/include/lifecycle/StaticBsp.h new file mode 100644 index 00000000000..adce1743969 --- /dev/null +++ b/executables/integrationTest/platforms/posix/main/include/lifecycle/StaticBsp.h @@ -0,0 +1,19 @@ +// Copyright 2025 Accenture. + +#pragma once + +#include "bsp/eeprom/IEepromDriver.h" +#include "eeprom/EepromDriver.h" + +class StaticBsp +{ +public: + StaticBsp() {} + + void init(); + + eeprom::IEepromDriver& getEepromDriver() { return _eepromDriver; } + +private: + ::eeprom::EepromDriver _eepromDriver; +}; diff --git a/executables/integrationTest/platforms/posix/main/module.spec b/executables/integrationTest/platforms/posix/main/module.spec new file mode 100644 index 00000000000..87faef85b71 --- /dev/null +++ b/executables/integrationTest/platforms/posix/main/module.spec @@ -0,0 +1 @@ +oss: true diff --git a/executables/integrationTest/platforms/posix/main/src/lifecycle/StaticBsp.cpp b/executables/integrationTest/platforms/posix/main/src/lifecycle/StaticBsp.cpp new file mode 100644 index 00000000000..c17a1f318b8 --- /dev/null +++ b/executables/integrationTest/platforms/posix/main/src/lifecycle/StaticBsp.cpp @@ -0,0 +1,5 @@ +// Copyright 2025 Accenture. + +#include "lifecycle/StaticBsp.h" + +void StaticBsp::init() { _eepromDriver.init(); } diff --git a/executables/integrationTest/platforms/posix/main/src/main.cpp b/executables/integrationTest/platforms/posix/main/src/main.cpp new file mode 100644 index 00000000000..f83f8405d3f --- /dev/null +++ b/executables/integrationTest/platforms/posix/main/src/main.cpp @@ -0,0 +1,47 @@ +// Copyright 2025 Accenture. + +#include "lifecycle/StaticBsp.h" + +#include +#include +#include + +#include +#include + +extern void terminal_cleanup(void); +extern void main_thread_setup(void); + +extern void app_main(); + +namespace platform +{ +StaticBsp staticBsp; + +StaticBsp& getStaticBsp() { return staticBsp; } + +void platformLifecycleAdd( + ::lifecycle::LifecycleManager& /* lifecycleManager */, uint8_t const /* level */) +{} + +} // namespace platform + +extern "C" +{ +void putchar_(char character) { putchar(character); } +} + +void intHandler(int /* sig */) +{ + terminal_cleanup(); + _exit(0); +} + +int main() +{ + signal(SIGINT, intHandler); + main_thread_setup(); + ::platform::staticBsp.init(); + app_main(); // entry point for the generic part + return (1); // we never reach this point +} diff --git a/executables/integrationTest/platforms/posix/main/src/osHooks/freertos/osHooks.cpp b/executables/integrationTest/platforms/posix/main/src/osHooks/freertos/osHooks.cpp new file mode 100644 index 00000000000..4aecb8c7edc --- /dev/null +++ b/executables/integrationTest/platforms/posix/main/src/osHooks/freertos/osHooks.cpp @@ -0,0 +1,14 @@ +// Copyright 2024 Accenture. + +#include "FreeRTOS.h" +#include "task.h" + +extern "C" +{ +void vApplicationStackOverflowHook(TaskHandle_t /* xTask */, char* /* pcTaskName */) +{ + while (true) + ; +} + +} // extern "C" diff --git a/executables/integrationTest/platforms/posix/main/src/osHooks/threadx/osHooks.cpp b/executables/integrationTest/platforms/posix/main/src/osHooks/threadx/osHooks.cpp new file mode 100644 index 00000000000..52ddd2deba8 --- /dev/null +++ b/executables/integrationTest/platforms/posix/main/src/osHooks/threadx/osHooks.cpp @@ -0,0 +1,6 @@ +// Copyright 2024 Accenture. + +#include "tx_api.h" + +extern "C" +{} // extern "C" diff --git a/executables/integrationTest/platforms/posix/threadXCoreConfiguration/CMakeLists.txt b/executables/integrationTest/platforms/posix/threadXCoreConfiguration/CMakeLists.txt new file mode 100644 index 00000000000..f0d6bbc1f68 --- /dev/null +++ b/executables/integrationTest/platforms/posix/threadXCoreConfiguration/CMakeLists.txt @@ -0,0 +1,3 @@ +add_library(threadXCoreConfiguration INTERFACE) + +target_include_directories(threadXCoreConfiguration INTERFACE include) diff --git a/executables/integrationTest/platforms/posix/threadXCoreConfiguration/include/tx_user.h b/executables/integrationTest/platforms/posix/threadXCoreConfiguration/include/tx_user.h new file mode 100644 index 00000000000..19bb4f0bc49 --- /dev/null +++ b/executables/integrationTest/platforms/posix/threadXCoreConfiguration/include/tx_user.h @@ -0,0 +1,61 @@ +// Copyright 2025 Accenture. + +#pragma once + +/* Override various options with default values already assigned in tx_port.h. Please also refer + to tx_port.h for descriptions on each of these options. */ + +#include "async/Config.h" + +#define ROUND_UP_32(x) (((x) + 31U) & ~31U) +#define TX_MAX_PRIORITIES_LIMIT 1024 +#define TX_MIN_PRIORITIES 32 + +/* Define the priority levels for ThreadX. Legal values range + from 32 to 1024 and MUST be evenly divisible by 32. */ +#ifdef TX_MAX_PRIORITIES +#undef TX_MAX_PRIORITIES +#endif + +#define TX_MAX_PRIORITIES \ + ((ROUND_UP_32(ASYNC_CONFIG_TASK_COUNT + 1U)) > TX_MAX_PRIORITIES_LIMIT \ + ? TX_MAX_PRIORITIES_LIMIT \ + : ((ROUND_UP_32(ASYNC_CONFIG_TASK_COUNT + 1U)) < TX_MIN_PRIORITIES \ + ? TX_MIN_PRIORITIES \ + : ROUND_UP_32(ASYNC_CONFIG_TASK_COUNT + 1U))) + +#if (TX_MAX_PRIORITIES < 32) || (TX_MAX_PRIORITIES > 1024) || ((TX_MAX_PRIORITIES % 32) != 0) +#error "TX_MAX_PRIORITIES must be between 32 and 1024 and evenly divisible by 32" +#endif + +/* Define the minimum stack for a ThreadX thread on this processor. If the size supplied during + thread creation is less than this value, the thread create call will return an error. */ +#ifndef TX_MINIMUM_STACK +#define TX_MINIMUM_STACK (1024U) +#endif + +// #define TX_LINUX_NO_IDLE_ENABLE +#define TX_TIMER_TICKS_PER_SECOND \ + (1000000U / ASYNC_CONFIG_TICK_IN_US) // System tick interval in seconds. + +#define TX_NO_FILEX_POINTER + +#define TX_DISABLE_PREEMPTION_THRESHOLD + +#ifndef TX_MAX_PRIORITIES +#define TX_MAX_PRIORITIES +#endif + +#define TX_LINUX_MEMORY_SIZE (256000U) + +#ifndef TX_LINUX_MULTI_CORE +#define TX_LINUX_MULTI_CORE +#endif + +#ifndef _GNU_SOURCE +#define _GNU_SOURCE +#endif + +#ifdef __linux__ +#include +#endif diff --git a/executables/integrationTest/platforms/posix/threadXCoreConfiguration/module.spec b/executables/integrationTest/platforms/posix/threadXCoreConfiguration/module.spec new file mode 100644 index 00000000000..87faef85b71 --- /dev/null +++ b/executables/integrationTest/platforms/posix/threadXCoreConfiguration/module.spec @@ -0,0 +1 @@ +oss: true diff --git a/executables/integrationTest/platforms/s32k148evb/CMakeLists.txt b/executables/integrationTest/platforms/s32k148evb/CMakeLists.txt new file mode 100644 index 00000000000..fea8993af0a --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/CMakeLists.txt @@ -0,0 +1,12 @@ +add_subdirectory(bspConfiguration) +add_subdirectory(main) + +if (BUILD_TARGET_RTOS STREQUAL "FREERTOS") + add_subdirectory(freeRtosCoreConfiguration) + add_library(freeRtosPort ALIAS freeRtosCm4SysTickPort) + add_library(freeRtosPortImpl ALIAS freeRtosCm4SysTick) +elseif (BUILD_TARGET_RTOS STREQUAL "THREADX") + add_subdirectory(threadXCoreConfiguration) + add_library(threadXPort ALIAS threadXCortexM4Port) + add_library(threadXPortImpl ALIAS threadXCortexM4) +endif () diff --git a/executables/integrationTest/platforms/s32k148evb/Options.cmake b/executables/integrationTest/platforms/s32k148evb/Options.cmake new file mode 100644 index 00000000000..aaccd0e8e25 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/Options.cmake @@ -0,0 +1,5 @@ +set(OPENBSW_PLATFORM s32k1xx) + +set(PLATFORM_SUPPORT_IO + ON + CACHE BOOL "Turn IO support on or off" FORCE) diff --git a/executables/integrationTest/platforms/s32k148evb/bspConfiguration/CMakeLists.txt b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/CMakeLists.txt new file mode 100644 index 00000000000..c8886601bf0 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/CMakeLists.txt @@ -0,0 +1,21 @@ +add_library( + bspConfiguration + src/bsp/adc/AnalogInput.cpp + src/bsp/io/outputPwm/PwmSupport.cpp + src/bsp/stdIo/stdIo.cpp + src/bsp/SystemTimer/SystemTimer.cpp + src/bsp/uart/UartConfig.cpp) + +target_include_directories(bspConfiguration PUBLIC include) + +target_link_libraries( + bspConfiguration + PUBLIC bspAdc + bspCharInputOutput + bspEepromDriver + bspFtm + bspFtmPwm + bspInterrupts + bspMcu + bspOutputPwm + bspUart) diff --git a/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/adc/AnalogInput.h b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/adc/AnalogInput.h new file mode 100644 index 00000000000..e0583708388 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/adc/AnalogInput.h @@ -0,0 +1,76 @@ +// Copyright 2025 Accenture. + +#pragma once + +#include "adc/Adc.h" + +namespace bios +{ +static uint8_t const ADC_0_CH = 0U; + +/** + * ADC configuration + */ +class Adc12BitConfiguration +{ +public: + enum + { + CFG1 = ADC_CFG1_ADIV(0) | ADC_CFG1_MODE(1), // Clock divided by 1, 12-bit conversion mode + CFG2 = ADC_CFG2_SMPLTS(41), // Sample time is 42 ADC clocks + CV1 = 0, + CV2 = 0, + SC2 = ADC_SC2_ADTRG(0) | ADC_SC2_DMAEN(0), // SW trigger, DMA is off + SC3 = ADC_SC3_CAL(0) | ADC_SC3_ADCO(0) + | ADC_SC3_AVGE(0), // Calibration disabled, One conversion, HW average disabled + BASE_OFS = 0x40UL, + OFS = 0x0UL, + USR_OFS = 0, + XOFS = 0x30UL, + YOFS = 0x37UL, + UG = 0x4UL, + CLPS_OFS = 0x0UL, + }; +}; + +typedef AdcInResolution tAdc12BitConvertor; + +typedef Adc tAdc12Bit; + +class AnalogInput +{ +public: + AnalogInput(); + +#undef BSP_ANALOGINPUT_PIN_CONFIGURATION +#include "bsp/adc/analogInputConfiguration.h" + + typedef struct + { + uint8_t adc; + uint8_t phChannel; + uint8_t pin; + uint8_t slot; + } tAnalogConfiguration; + + void init(); + void start(); + + static bsp::BspReturnCode get(uint16_t channel, uint16_t& value); + static bsp::BspReturnCode get(uint16_t channel, uint32_t& value); + + static char const* getName(uint16_t channel); + + void stop(); + + void cyclic(); + + static uint16_t const AdcCountAll = static_cast(_AdcChannelMax); + +private: + static tAdc12Bit fAdc0; + + static tAnalogConfiguration const* fADChannelCfg; +}; + +} // namespace bios diff --git a/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/adc/AnalogInputScale.h b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/adc/AnalogInputScale.h new file mode 100644 index 00000000000..cf6f34a15c6 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/adc/AnalogInputScale.h @@ -0,0 +1,11 @@ +// Copyright 2025 Accenture. + +#pragma once + +#include "adc/AnalogInputScaleImplementation.h" + +namespace bios +{ +typedef bios::AnalogInputScaleImplementation AnalogInputScale; + +} diff --git a/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/adc/analogInputConfiguration.h b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/adc/analogInputConfiguration.h new file mode 100644 index 00000000000..2665f647df0 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/adc/analogInputConfiguration.h @@ -0,0 +1,35 @@ +// Copyright 2025 Accenture. + +// IGNORE_INCLUDE_GUARD_CHECK + +#if defined(BSP_ANALOGINPUT_PIN_CONFIGURATION) && (BSP_ANALOGINPUT_PIN_CONFIGURATION == 1) +/** + * Configuration of analog signals + * + * Order must be the same as the order of the signal IDs defined below. + * + * , , , + */ +AnalogInput::tAnalogConfiguration const ADChannelCfg[AnalogInput::_AdcChannelMax] = { + {ADC_0_CH, _ADCCHANNEL28, Io::EVAL_POTI_ADC, _ADCCHANNEL0}, + {ADC_0_CH, _ADCCHANNEL29, Io::EVAL_ADC, _ADCCHANNEL0}, + {ADC_0_CH, _BANDGAP, Io::PORT_UNAVAILABLE, _ADCCHANNEL13}, + {ADC_0_CH, _ADCINTERNAL0, Io::PORT_UNAVAILABLE, _ADCCHANNEL14}, +}; + +#else +/** + * Analog input signal IDs + */ +enum AnalogInputId +{ + AiEVAL_POTI_ADC, + AiEval_ADC, + Ai_BANDGAP, + Ai_ADCINTERNAL0, + + // end marker + _AdcChannelMax +}; + +#endif diff --git a/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/adc/analogInputConfigurationStrings.h b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/adc/analogInputConfigurationStrings.h new file mode 100644 index 00000000000..98a2dcfbc66 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/adc/analogInputConfigurationStrings.h @@ -0,0 +1,13 @@ +// Copyright 2025 Accenture. + +#pragma once + +/** + * Signal names for debugging purposes, same order as signal IDs + */ +char const* const adcChannelsNamingStrings[] = { + "AiEval_Poti_ADC", + "AiEval_ADC", + "Ai_BANDGAP", + "Ai_ADCINTERNAL0", +}; diff --git a/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/adc/analogInputScaleConfiguration.h b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/adc/analogInputScaleConfiguration.h new file mode 100644 index 00000000000..5edc4c82a49 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/adc/analogInputScaleConfiguration.h @@ -0,0 +1,16 @@ +// Copyright 2025 Accenture. + +#pragma once + +#include "bsp/adc/AnalogInputScale.h" + +uint32_t const precisionFactor = 1000U; +uint32_t const _5_0Volt12BitResolution = 5000U * precisionFactor / 4095U; +AnalogInputScale::scale const analogInputScaleConfiguration[] = { + // clang-format off + &scaleFunction, // AiEVAL_POTI_ADC + &scaleFunction, //AiEval_ADC + &scaleFunction, //Ai_BANDGAP + &scaleFunction, //Ai_ADCINTERNAL0 + // clang-format on +}; diff --git a/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/charInputOutput/CharIOSerialCfg.h b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/charInputOutput/CharIOSerialCfg.h new file mode 100644 index 00000000000..368995fd646 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/charInputOutput/CharIOSerialCfg.h @@ -0,0 +1,17 @@ +// Copyright 2025 Accenture. + +#pragma once + +/** + * Asynchronous buffer size for logger output in bytes + */ +#ifndef __DEBUG_ANIMATION +#define CHARIOSERIAL_BUFFERSIZE 256 +#else +#define CHARIOSERIAL_BUFFERSIZE 100 +#endif + +/** + * Timeout for busy wait + */ +#define SCI_LOGGERTIMEOUT 10000 diff --git a/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/clock/boardClock.h b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/clock/boardClock.h new file mode 100644 index 00000000000..3f4b07349c3 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/clock/boardClock.h @@ -0,0 +1,154 @@ +// Copyright 2025 Accenture. + +#pragma once + +#ifdef __cplusplus +extern "C" +{ +#endif + +#define CRYSTAL_SPEED 8000000U +#define CRYSTAL_SPEED_KHZ ((CRYSTAL_SPEED) / (1000)) + +#define CPU_SPEED 80000000U + +#define CPU_SPEED_MHZ ((CPU_SPEED) / (1000000)) +#define BUS_SPEED ((CPU_SPEED) / (2)) +#define BUS_SPEED_MHZ ((BUS_SPEED) / (1000000)) + +#define CPU_XTAL_CLK_HZ CRYSTAL_SPEED +#define CPU_INT_FAST_CLK_HZ 48000000U +#define DEFAULT_SYSTEM_CLOCK 48000000U + +#define CORE_CLK CPU_SPEED +#define SYS_CLK CPU_SPEED +#define BUS_CLK (CPU_SPEED / 2) + +#define CLOCKSET_PCC(sel, frac, pcd) (((sel) << 24) | ((frac) << 3) | (pcd)) + +#if (SYS_CLK == 48000000U) +#define _SCG_RCCR_SCS (3 << 24) +#define _SCG_RCCR_DIVCORE (0 << 16) +#define _SCG_RCCR_DIVBUS (0 << 4) +#define _SCG_RCCR_DIVSLOW (1) + +#define _SPLLDIV1 (1) +#define _SPLLDIV2 (1) +#define _FIRCDIV1 (1) +#define _FIRCDIV2 (1) +#define _SIRCDIV1 (1) +#define _SIRCDIV2 (1) +#define _SOSCDIV1 (1) +#define _SOSCDIV2 (1) + +#define CLOCKoUT_SELECT (0) + +#define CLOCK_SOURCE_FTM3 (1 << 24) +#define CLOCK_SOURCE_ADC1 (1 << 24) +#define CLOCK_SOURCE_LPSPI0 (1 << 24) +#define CLOCK_SOURCE_LPSPI1 (1 << 24) +#define CLOCK_SOURCE_LPSPI2 (1 << 24) +#define CLOCK_SOURCE_LPIT (1 << 24) + +#define CLOCK_SOURCE_FTM0 (1 << 24) +#define CLOCK_SOURCE_FTM1 (1 << 24) +#define CLOCK_SOURCE_FTM2 (1 << 24) +#define CLOCK_SOURCE_ADC0 (1 << 24) + +#define CLOCK_SOURCE_LPTMR0 CLOCKSET_PCC(1, 0, 0) +#define CLOCK_SOURCE_FLEXIO CLOCKSET_PCC(1, 0, 0) +#define CLOCK_SOURCE_LPI2C0 CLOCKSET_PCC(1, 0, 0) + +#define CLOCK_SOURCE_LPUART0 CLOCKSET_PCC(1, 0, 0) +#define CLOCK_SOURCE_LPUART1 CLOCKSET_PCC(1, 0, 0) +#define CLOCK_SOURCE_LPUART2 CLOCKSET_PCC(1, 0, 0) + +#define CLOCK_SOURCE_FTM4 (1 << 24) +#define CLOCK_SOURCE_FTM5 (1 << 24) + +#elif (SYS_CLK == 80000000U) + +#define _SCG_RCCR_SCS (6 << 24) +#define _SCG_RCCR_DIVCORE (1 << 16) +#define _SCG_RCCR_DIVBUS (1 << 4) +#define _SCG_RCCR_DIVSLOW (2) + +#define _SPLLDIV1 (1) +#define _SPLLDIV2 (1) +#define _FIRCDIV1 (1) +#define _FIRCDIV2 (1) +#define _SIRCDIV1 (1) +#define _SIRCDIV2 (1) +#define _SOSCDIV1 (1) +#define _SOSCDIV2 (1) + +#define PLLDIV1 0 +#define PLLDIV2 1 +#define PLLDIV3 2 +#define PLLDIV4 3 +#define PLLDIV5 4 +#define PLLDIV6 5 +#define PLLDIV7 6 +#define PLLDIV8 7 + +#define PLLMULT16 0UL +#define PLLMULT40 (40 - 16) +#define PLLMULT47 (47 - 16) + +/* + * VCOPLL = 320MHz + * SPLL 160MHz + * + * */ +// setup reset for PLL Lock lost. +// VCO_CLK = 320 MHz, SPLL_CLK = 160 MHz +// • SCG_RCCR[SCS] = 0110b +// • SCG_RCCR[DIVCORE] = 0001b +// • SCG_RCCR[DIVBUS] = 0001b +// • SCG_RCCR[DIVSLOW] = 0010b +// + +#define SYSTEMCLICK_SCS_OSC_CLK 1UL +#define SYSTEMCLICK_SCS_SIRC_CLK 2UL +#define SYSTEMCLICK_SCS_FIRC_CLK 3UL +#define SYSTEMCLICK_SCS_SPLL_CLK 6UL + +#define PLL_CONFIG ((PLLDIV1 << 8) | (PLLMULT40 << 16)) + +#define CLOCKoUT_SELECT (0) + +#define CLOCK_SOURCE_ADC1 (SYSTEMCLICK_SCS_FIRC_CLK << 24) +#define CLOCK_SOURCE_LPSPI0 (SYSTEMCLICK_SCS_FIRC_CLK << 24) +#define CLOCK_SOURCE_LPSPI1 (SYSTEMCLICK_SCS_FIRC_CLK << 24) +#define CLOCK_SOURCE_LPSPI2 (SYSTEMCLICK_SCS_FIRC_CLK << 24) +#define CLOCK_SOURCE_LPIT CLOCKSET_PCC(SYSTEMCLICK_SCS_SIRC_CLK, 0, 0) + +#define CLOCK_SOURCE_FTM0 (SYSTEMCLICK_SCS_OSC_CLK << 24) +#define CLOCK_SOURCE_FTM1 (SYSTEMCLICK_SCS_SPLL_CLK << 24) +#define CLOCK_SOURCE_FTM2 (SYSTEMCLICK_SCS_OSC_CLK << 24) +#define CLOCK_SOURCE_FTM3 (SYSTEMCLICK_SCS_SPLL_CLK << 24) +#define CLOCK_SOURCE_FTM4 (SYSTEMCLICK_SCS_SPLL_CLK << 24) +#define CLOCK_SOURCE_FTM5 (SYSTEMCLICK_SCS_OSC_CLK << 24) + +#define CLOCK_SOURCE_ADC0 (SYSTEMCLICK_SCS_FIRC_CLK << 24) + +#define CLOCK_SOURCE_LPTMR0 CLOCKSET_PCC(SYSTEMCLICK_SCS_OSC_CLK, 0, 0) +#define CLOCK_SOURCE_FLEXIO CLOCKSET_PCC(SYSTEMCLICK_SCS_OSC_CLK, 0, 0) +#define CLOCK_SOURCE_LPI2C0 CLOCKSET_PCC(SYSTEMCLICK_SCS_OSC_CLK, 0, 0) + +#define CLOCK_SOURCE_LPUART0 CLOCKSET_PCC(SYSTEMCLICK_SCS_OSC_CLK, 0, 0) +#define CLOCK_SOURCE_LPUART1 CLOCKSET_PCC(SYSTEMCLICK_SCS_FIRC_CLK, 0, 0) +#define CLOCK_SOURCE_LPUART2 CLOCKSET_PCC(SYSTEMCLICK_SCS_FIRC_CLK, 0, 0) + +#define CLOCK_SOURCE_ENET (SYSTEMCLICK_SCS_FIRC_CLK << 24) + +#endif + +#define _RCM_SRIE_ ((3UL) | (1UL << 7) | (1UL << 5)) + +#define _SCG_RCCR_ \ + ((_SCG_RCCR_SCS) | (_SCG_RCCR_DIVCORE) | (_SCG_RCCR_DIVBUS) | (_SCG_RCCR_DIVSLOW)) + +#ifdef __cplusplus +} +#endif diff --git a/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/eeprom/EepromConfiguration.h b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/eeprom/EepromConfiguration.h new file mode 100644 index 00000000000..26cd9af6aee --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/eeprom/EepromConfiguration.h @@ -0,0 +1,18 @@ +// Copyright 2025 Accenture. + +#pragma once + +#include "eeprom/EepromDriver.h" + +namespace eeprom +{ + +static constexpr EepromConfiguration EEPROM_CONFIG + = {0x14000000UL, // Base FlexRAM address + 4 * 1024, // Total size of FlexRAM area + 0, // Protected area size + false, // Load EEPROM during reset + 2, // EEPROM Data Set size code 2 - 4KB Data Set size + 4}; // DEPART + +} // namespace eeprom diff --git a/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/io/input/inputConfiguration.h b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/io/input/inputConfiguration.h new file mode 100644 index 00000000000..f3e27d34019 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/io/input/inputConfiguration.h @@ -0,0 +1,36 @@ +// Copyright 2025 Accenture. + +// IGNORE_INCLUDE_GUARD_CHECK + +#if defined(BSP_INPUT_PIN_CONFIGURATION) && (BSP_INPUT_PIN_CONFIGURATION == 1) +DigitalInput::InputConfiguration const + DigitalInput::sfDigitalInputConfigurations[][DigitalInput::NUMBER_OF_INTERNAL_DIGITAL_INPUTS] + = { + { + /* 0 */ {Io::EVAL_DI_1, Io::HIGH_ACTIVE, 1}, + /* 1 */ {Io::EVAL_SW3, Io::HIGH_ACTIVE, 1}, + }, +}; + +DigitalInput::InputConfiguration const* +DigitalInput::getConfiguration(uint8_t /* hardwareVersion */) +{ + return &sfDigitalInputConfigurations[0][0]; +} + +#else + +enum DigitalInputId +{ + /* 0 */ EVAL_DI_1, + /* 1 */ EVAL_SW3, + // other internal inputs go here + // update LAST_INTERNAL_DIGITAL_INPUT when adding a new internal input + LAST_INTERNAL_DIGITAL_INPUT = EVAL_SW3, + // dynamic inputs go here + // update LAST_DYNAMIC_DIGITAL_INPUT when adding a new external input + /* yy */ // MyFirstDynamicInput, + LAST_DYNAMIC_DIGITAL_INPUT = LAST_INTERNAL_DIGITAL_INPUT, + PORT_UNAVAILABLE +}; +#endif /* #if (BSP_INPUT_PIN_CONFIGURATION == 1) */ diff --git a/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/io/input/inputConfigurationStrings.h b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/io/input/inputConfigurationStrings.h new file mode 100644 index 00000000000..418b714c059 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/io/input/inputConfigurationStrings.h @@ -0,0 +1,9 @@ +// Copyright 2025 Accenture. + +#pragma once + +char const* const inputConfigurationStrings[] = { + /* 0 */ "eval_DI_1", + /* 1 */ "EVAL_SW3", + "lastStatic", +}; diff --git a/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/io/io/ioConfiguration.h b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/io/io/ioConfiguration.h new file mode 100644 index 00000000000..84ec43ef3db --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/io/io/ioConfiguration.h @@ -0,0 +1,343 @@ +// Copyright 2025 Accenture. + +// IGNORE_INCLUDE_GUARD_CHECK + +#if defined(BSP_IO_PIN_CONFIGURATION) && (BSP_IO_PIN_CONFIGURATION == 1) + +Io::PinConfiguration const Io::fPinConfiguration[Io::NUMBER_OF_IOS] = { + // clang-format off + + /* 00 */ {_PORTA_, PA0, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, GPIO}, + /* 01 */ {_PORTA_, PA1, _OUT, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, (uint32_t) GPIO | (uint32_t) STRENGTH_ON}, + /* 02 */ {_PORTA_, PA2, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 03 */ {_PORTA_, PA3, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 04 */ {_PORTA_, PA4, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 05 */ {_PORTA_, PA5, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 06 */ {_PORTA_, PA6, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 07 */ {_PORTA_, PA7, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 08 */ {_PORTA_, PA8, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 09 */ {_PORTA_, PA9, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 10 */ {_PORTA_, PA10, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 11 */ {_PORTA_, PA11, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 12 */ {_PORTA_, PA12, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 13 */ {_PORTA_, PA13, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 14 */ {_PORTA_, PA14, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 15 */ {_PORTA_, PA15, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 16 */ {_PORTA_, PA16, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 17 */ {_PORTA_, PA17, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 18 */ {_PORTA_, PA18, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 19 */ {_PORTA_, PA19, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 20 */ {_PORTA_, PA20, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 21 */ {_PORTA_, PA21, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 22 */ {_PORTA_, PA22, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 23 */ {_PORTA_, PA23, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 24 */ {_PORTA_, PA24, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 25 */ {_PORTA_, PA25, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 26 */ {_PORTA_, PA26, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 27 */ {_PORTA_, PA27, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 28 */ {_PORTA_, PA28, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 29 */ {_PORTA_, PA29, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 30 */ {_PORTA_, PA30, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 31 */ {_PORTA_, PA31, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + + /* 32 */ {_PORTB_, PB0, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 33 */ {_PORTB_, PB1, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 34 */ {_PORTB_, PB2, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 35 */ {_PORTB_, PB3, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 36 */ {_PORTB_, PB4, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, GPIO}, + /* 37 */ {_PORTB_, PB5, _OUT, 0, GPIO}, + /* 38 */ {_PORTB_, PB6, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 39 */ {_PORTB_, PB7, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 40 */ {_PORTB_, PB8, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 41 */ {_PORTB_, PB9, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 42 */ {_PORTB_, PB10, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 43 */ {_PORTB_, PB11, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 44 */ {_PORTB_, PB12, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 45 */ {_PORTB_, PB13, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 46 */ {_PORTB_, PB14, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 47 */ {_PORTB_, PB15, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 48 */ {_PORTB_, PB16, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 49 */ {_PORTB_, PB17, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 50 */ {_PORTB_, PB18, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 51 */ {_PORTB_, PB19, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 52 */ {_PORTB_, PB20, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 53 */ {_PORTB_, PB21, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 54 */ {_PORTB_, PB22, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 55 */ {_PORTB_, PB23, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 56 */ {_PORTB_, PB24, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 57 */ {_PORTB_, PB25, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 58 */ {_PORTB_, PB26, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 59 */ {_PORTB_, PB27, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 60 */ {_PORTB_, PB28, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 61 */ {_PORTB_, PB29, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 62 */ {_PORTB_, PB30, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 63 */ {_PORTB_, PB31, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + + /* 64 */ {_PORTC_, PC0, _IN, 0, ALT4}, + /* 65 */ {_PORTC_, PC1, _IN, 0, ALT5}, + /* 66 */ {_PORTC_, PC2, _IN, 0, ALT5}, + /* 67 */ {_PORTC_, PC3, _IN, 0, ALT5}, + /* 68 */ {_PORTC_, PC4, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 69 */ {_PORTC_, PC5, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 70 */ {_PORTC_, PC6, _IN, 0, ALT2}, + /* 71 */ {_PORTC_, PC7, _OUT, 0, (uint32_t) ALT2 | (uint32_t) STRENGTH_ON}, + /* 72 */ {_PORTC_, PC8, _IN, 0, ALT2}, + /* 73 */ {_PORTC_, PC9, _OUT, 0, (uint32_t) ALT2 | (uint32_t) STRENGTH_ON}, + /* 74 */ {_PORTC_, PC10, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 75 */ {_PORTC_, PC11, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 76 */ {_PORTC_, PC12, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, GPIO}, + /* 77 */ {_PORTC_, PC13, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 78 */ {_PORTC_, PC14, _OUT, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, (uint32_t) GPIO | (uint32_t) STRENGTH_ON}, + /* 79 */ {_PORTC_, PC15, _OUT, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, (uint32_t) ALT3 | (uint32_t) STRENGTH_ON}, + /* 80 */ {_PORTC_, PC16, _IN, 0, ALT5}, + /* 81 */ {_PORTC_, PC17, _IN, 0, ALT5}, + /* 82 */ {_PORTC_, PC18, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 83 */ {_PORTC_, PC19, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 84 */ {_PORTC_, PC20, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 85 */ {_PORTC_, PC21, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 86 */ {_PORTC_, PC22, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 87 */ {_PORTC_, PC23, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 88 */ {_PORTC_, PC24, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 89 */ {_PORTC_, PC25, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 90 */ {_PORTC_, PC26, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 91 */ {_PORTC_, PC27, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 92 */ {_PORTC_, PC28, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 93 */ {_PORTC_, PC29, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 94 */ {_PORTC_, PC30, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 95 */ {_PORTC_, PC31, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + + /* 96 */ {_PORTD_, PD0, _OUT, 0, (uint32_t) ALT3 | (uint32_t) (uint32_t) STRENGTH_ON | (uint32_t) PULLUP}, + /* 97 */ {_PORTD_, PD1, _IN, 0, (uint32_t) ALT3 | (uint32_t) PULLUP}, + /* 98 */ {_PORTD_, PD2, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 99 */ {_PORTD_, PD3, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 100 */ {_PORTD_, PD4, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 101 */ {_PORTD_, PD5, _IN, 0, ALT5}, + /* 102 */ {_PORTD_, PD6, _IN, 0, ALT5}, + /* 103 */ {_PORTD_, PD7, _IN, 0, ALT5}, + /* 104 */ {_PORTD_, PD8, _IN, 0, ALT3}, + /* 105 */ {_PORTD_, PD9, _IN, 0, ALT5}, + /* 106 */ {_PORTD_, PD10, _IN, 0, ALT5}, + /* 107 */ {_PORTD_, PD11, _IN, 0, ALT5}, + /* 108 */ {_PORTD_, PD12, _IN, 0, ALT5}, + /* 109 */ {_PORTD_, PD13, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 110 */ {_PORTD_, PD14, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 111 */ {_PORTD_, PD15, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 112 */ {_PORTD_, PD16, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 113 */ {_PORTD_, PD17, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 114 */ {_PORTD_, PD18, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 115 */ {_PORTD_, PD19, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 116 */ {_PORTD_, PD20, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 117 */ {_PORTD_, PD21, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 118 */ {_PORTD_, PD22, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 119 */ {_PORTD_, PD23, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 120 */ {_PORTD_, PD24, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 121 */ {_PORTD_, PD25, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 122 */ {_PORTD_, PD26, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 123 */ {_PORTD_, PD27, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 124 */ {_PORTD_, PD28, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 125 */ {_PORTD_, PD29, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 126 */ {_PORTD_, PD30, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 127 */ {_PORTD_, PD31, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + + /* 128 */ {_PORTE_, PE0, _OUT, 0, (uint32_t) ALT5 | (uint32_t) STRENGTH_ON}, + /* 129 */ {_PORTE_, PE1, _OUT, 0, (uint32_t) GPIO | (uint32_t) (uint32_t) STRENGTH_ON | (uint32_t) PULLUP}, + /* 130 */ {_PORTE_, PE2, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 131 */ {_PORTE_, PE3, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 132 */ {_PORTE_, PE4, _IN, 0, ALT5}, + /* 133 */ {_PORTE_, PE5, _OUT, 0, (uint32_t) ALT5 | (uint32_t) STRENGTH_ON}, + /* 134 */ {_PORTE_, PE6, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 135 */ {_PORTE_, PE7, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 136 */ {_PORTE_, PE8, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 137 */ {_PORTE_, PE9, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 138 */ {_PORTE_, PE10, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 139 */ {_PORTE_, PE11, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 140 */ {_PORTE_, PE12, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 141 */ {_PORTE_, PE13, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 142 */ {_PORTE_, PE14, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 143 */ {_PORTE_, PE15, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 144 */ {_PORTE_, PE16, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 145 */ {_PORTE_, PE17, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 146 */ {_PORTE_, PE18, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 147 */ {_PORTE_, PE19, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 148 */ {_PORTE_, PE20, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 149 */ {_PORTE_, PE21, _OUT, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, (uint32_t) GPIO | (uint32_t) STRENGTH_ON}, + /* 150 */ {_PORTE_, PE22, _OUT, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, (uint32_t) ALT2 | (uint32_t) STRENGTH_ON}, + /* 151 */ {_PORTE_, PE23, _OUT, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, (uint32_t) ALT2 | (uint32_t) STRENGTH_ON}, + /* 152 */ {_PORTE_, PE24, _OUT, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, (uint32_t) ALT2 | (uint32_t) STRENGTH_ON}, + /* 153 */ {_PORTE_, PE25, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 154 */ {_PORTE_, PE26, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 155 */ {_PORTE_, PE27, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + + // clang-format on +}; + +#else + +enum PinId +{ + /* 00 */ EVAL_DI_1, + /* 01 */ EVAL_DO_1, + /* 02 */ EVAL_AI_1, + /* 03 */ PIN_A_3, + /* 04 */ PIN_A_4, + /* 05 */ PIN_A_5, + /* 06 */ PIN_A_6, + /* 07 */ PIN_A_7, + /* 08 */ PIN_A_8, + /* 09 */ PIN_A_9, + /* 10 */ PIN_A_10, + /* 11 */ PIN_A_11, + /* 12 */ PIN_A_12, + /* 13 */ PIN_A_13, + /* 14 */ PIN_A_14, + /* 15 */ PIN_A_15, + /* 16 */ PIN_A_16, + /* 17 */ PIN_A_17, + /* 18 */ PIN_A_18, + /* 19 */ PIN_A_19, + /* 20 */ PIN_A_20, + /* 21 */ PIN_A_21, + /* 22 */ PIN_A_22, + /* 23 */ PIN_A_23, + /* 24 */ PIN_A_24, + /* 25 */ PIN_A_25, + /* 26 */ PIN_A_26, + /* 27 */ PIN_A_27, + /* 28 */ PIN_A_28, + /* 29 */ PIN_A_29, + /* 30 */ PIN_A_30, + /* 31 */ PIN_A_31, + + /* 32 */ PIN_B_0, + /* 33 */ PIN_B_1, + /* 34 */ PIN_B_2, + /* 35 */ PIN_B_3, + /* 36 */ TJA_MDIO, // PIN_B_4 + /* 37 */ TJA_MDC, // PIN_B_5 + /* 38 */ PIN_B_6, + /* 39 */ PIN_B_7, + /* 40 */ PIN_B_8, + /* 41 */ PIN_B_9, + /* 42 */ PIN_B_10, + /* 43 */ PIN_B_11, + /* 44 */ PIN_B_12, + /* 45 */ PIN_B_13, + /* 46 */ PIN_B_14, + /* 47 */ PIN_B_15, + /* 48 */ PIN_B_16, + /* 49 */ PIN_B_17, + /* 50 */ PIN_B_18, + /* 51 */ PIN_B_19, + /* 52 */ PIN_B_20, + /* 53 */ PIN_B_21, + /* 54 */ PIN_B_22, + /* 55 */ PIN_B_23, + /* 56 */ PIN_B_24, + /* 57 */ PIN_B_25, + /* 58 */ PIN_B_26, + /* 59 */ PIN_B_27, + /* 60 */ PIN_B_28, + /* 61 */ PIN_B_29, + /* 62 */ PIN_B_30, + /* 63 */ PIN_B_31, + + /* 64 */ MII_RMII_RXD1, // PIN_C_0, + /* 65 */ MII_RMII_RXD0, // PIN_C_1, + /* 66 */ MII_RMII_TXD0, // PIN_C_2, + /* 67 */ MII_TX_ER, // PIN_C_3, + /* 68 */ PIN_C_4, + /* 69 */ PIN_C_5, + /* 70 */ UART1_RX, + /* 71 */ UART1_TX, + /* 72 */ LIN1_Rx, + /* 73 */ LIN1_Tx, + /* 74 */ PIN_C_10, + /* 75 */ PIN_C_11, + /* 76 */ EVAL_SW3, + /* 77 */ PIN_C_13, + /* 78 */ SPI2_CSN0, + /* 79 */ SPI2_SCK, + /* 80 */ MII_RMII_RX_ER, // PIN_C_16, + /* 81 */ MII_RMII_RX_DV, // PIN_C_17, + /* 82 */ EVAL_POTI_ADC, + /* 83 */ EVAL_ADC, + /* 84 */ PIN_C_20, + /* 85 */ PIN_C_21, + /* 86 */ PIN_C_22, + /* 87 */ PIN_C_23, + /* 88 */ PIN_C_24, + /* 89 */ PIN_C_25, + /* 90 */ PIN_C_26, + /* 91 */ PIN_C_27, + /* 92 */ PIN_C_28, + /* 93 */ PIN_C_29, + /* 94 */ PIN_C_30, + /* 95 */ PIN_C_31, + + /* 96 */ SPI1_SCK, + /* 97 */ SPI1_MISO, + /* 98 */ PIN_D_2, + /* 99 */ PIN_D_3, + /* 100 */ PIN_D_4, + /* 101 */ MII_TXD3, // PIN_D_5 + /* 102 */ MII_TXD2, // PIN_D_6 + /* 103 */ MII_RMII_TXD1, // PIN_D_7 + /* 104 */ MII_RXD3, // PIN_D_8 + /* 105 */ MII_RXD2, // PIN_D_9 + /* 106 */ MII_RX_CLK, // PIN_D_10 + /* 107 */ MII_RMII_TX_CLK, // PIN_D_11, + /* 108 */ MII_RMII_TX_EN, // PIN_D_12, + /* 109 */ PIN_D_13, + /* 110 */ PIN_D_14, + /* 111 */ PIN_D_15, + /* 112 */ PIN_D_16, + /* 113 */ PIN_D_17, + /* 114 */ PIN_D_18, + /* 115 */ PIN_D_19, + /* 116 */ PIN_D_20, + /* 117 */ PIN_D_21, + /* 118 */ PIN_D_22, + /* 119 */ PIN_D_23, + /* 120 */ PIN_D_24, + /* 121 */ PIN_D_25, + /* 122 */ PIN_D_26, + /* 123 */ PIN_D_27, + /* 124 */ PIN_D_28, + /* 125 */ PIN_D_29, + /* 126 */ PIN_D_30, + /* 127 */ PIN_D_31, + + /* 128 */ SPI1_MOSI, + /* 129 */ SPI1_CSN0, + /* 130 */ PIN_E_2, + /* 131 */ PIN_E_3, + /* 132 */ canRx, + /* 133 */ canTx, + /* 134 */ PIN_E_6, + /* 135 */ PIN_E_7, + /* 136 */ PIN_E_8, + /* 137 */ PIN_E_9, + /* 138 */ PIN_E_10, + /* 139 */ PIN_E_11, + /* 140 */ PIN_E_12, + /* 141 */ PIN_E_13, + /* 142 */ PIN_E_14, + /* 143 */ PIN_E_15, + /* 144 */ PIN_E_16, + /* 145 */ PIN_E_17, + /* 146 */ PIN_E_18, + /* 147 */ PIN_E_19, + /* 148 */ PIN_E_20, + /* 149 */ EVAL_LED_RED, + /* 150 */ EVAL_LED_GREEN, + /* 151 */ EVAL_LED_BLUE, + /* 152 */ FTM4_CH4, + /* 153 */ PIN_E_25, + /* 154 */ PIN_E_26, + /* 155 */ PIN_E_27, + + /* xx */ NUMBER_OF_INPUTS_AND_OUTPUTS, + /* xx */ PORT_UNAVAILABLE = NUMBER_OF_INPUTS_AND_OUTPUTS, +}; + +#endif /* BSP_IO_PIN_CONFIGURATION == 1 */ diff --git a/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/io/output/outputConfiguration.h b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/io/output/outputConfiguration.h new file mode 100644 index 00000000000..bad55b5ccfb --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/io/output/outputConfiguration.h @@ -0,0 +1,40 @@ +// Copyright 2025 Accenture. + +// IGNORE_INCLUDE_GUARD_CHECK + +#if defined(BSPOUTPUTCONFIG) && (BSPOUTPUTCONFIG == 1) + +Output::OutputConfig const Output::sfOutputConfigurations[1][Output::NUMBER_OF_INTERNAL_OUTPUTS] + = {{ + /* 0 */ {Io::EVAL_DO_1, Io::LOW, Io::HIGH_ACTIVE}, + /* 1 */ {Io::EVAL_LED_RED, Io::HIGH, Io::HIGH_ACTIVE}, + /* 2 */ {Io::TJA_MDIO, Io::HIGH, Io::HIGH_ACTIVE}, + /* 3 */ {Io::TJA_MDC, Io::HIGH, Io::HIGH_ACTIVE}, + }}; + +Output::OutputConfig const* Output::getConfiguration(uint8_t /* hardwareVersion */) +{ + return &sfOutputConfigurations[0][0]; +} + +#else + +enum OutputId +{ + /* 0 */ EVAL_DO_1, + /* 1 */ EVAL_LED_RED, + /* 2 */ TJA_MDIO, + /* 3 */ TJA_MDC, + + /* xx */ NUMBER_OF_INTERNAL_OUTPUTS, + + // dynamic outputs here + /* yy */ // MyDynamicOutput, + + END_EXTERNAL_OUTPUTS, + NUMBER_OF_EXTERNAL_OUTPUTS = END_EXTERNAL_OUTPUTS - NUMBER_OF_INTERNAL_OUTPUTS, + TOTAL_NUMBER_OF_OUTPUTS = NUMBER_OF_INTERNAL_OUTPUTS + NUMBER_OF_EXTERNAL_OUTPUTS, + PORT_UNAVAILABLE = TOTAL_NUMBER_OF_OUTPUTS +}; + +#endif /* BSP_OUTPUT_PIN_CONFIGURATION == 1 */ diff --git a/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/io/output/outputConfigurationStrings.h b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/io/output/outputConfigurationStrings.h new file mode 100644 index 00000000000..c340eeff447 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/io/output/outputConfigurationStrings.h @@ -0,0 +1,12 @@ +// Copyright 2025 Accenture. + +#pragma once + +char const* const outputConfigurationStrings[] = { + /* 0 */ "eval_DO_1", + /* 1 */ "EVAL_LED_RED", + /* 2 */ "TJA_MDIO", + /* 3 */ "TJA_MDC", + + "lastStatic", +}; diff --git a/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/io/outputPwm/PwmSupport.h b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/io/outputPwm/PwmSupport.h new file mode 100644 index 00000000000..4f692cb89ab --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/io/outputPwm/PwmSupport.h @@ -0,0 +1,31 @@ +// Copyright 2025 Accenture. + +#pragma once + +#include "ftmPwm/FtmCentralAlignedCombinePwm.h" +#include "ftmPwm/FtmECombinePwm.h" +#include "ftmPwm/FtmEPwm.h" +#include "ftmPwm/FtmModCombinePwm.h" +#include "outputPwm/OutputPwm.h" + +namespace bios +{ +class PwmSupport : public OutputPwm::IDynamicPwmClient +{ +public: + PwmSupport(tFtm& ftm4); + void init(); + void start(); + void stop(); + void shutdown(); + virtual bsp::BspReturnCode setDuty(uint16_t chan, uint16_t duty, bool immediateUpdate); + virtual bsp::BspReturnCode setPeriod(uint16_t chan, uint16_t period); + +private: + // < hw channel, resolution > + FtmEPwm<2, 100> eval_led_green_pwm; + FtmEPwm<3, 100> eval_led_blue_pwm; + FtmEPwm<4, 100> test_pwm; +}; + +} // namespace bios diff --git a/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/io/outputPwm/PwmSupportConfiguration.hpp b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/io/outputPwm/PwmSupportConfiguration.hpp new file mode 100644 index 00000000000..513f4df591a --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/io/outputPwm/PwmSupportConfiguration.hpp @@ -0,0 +1,25 @@ +// Copyright 2025 Accenture. + +#pragma once + +#include "ftmPwm/FtmECombinePwm.h" +#include "ftmPwm/FtmEPwm.h" +#include "ftmPwm/FtmModCombinePwm.h" +#include "io/Io.h" + +namespace bios +{ + +// ftm4:2 +tFtmEPwmConfiguration const EVAL_LED_GREEN_PWM_Configuration + = {tFtm::PWM_EdgeAlignedetSet0, false, false, false, Io::EVAL_LED_GREEN, 0, 10000}; + +// ftm4:3 +tFtmEPwmConfiguration const EVAL_LED_BLUE_PWM_Configuration + = {tFtm::PWM_EdgeAlignedetSet0, false, false, false, Io::EVAL_LED_BLUE, 0, 10000}; + +// ftm4:4 +tFtmEPwmConfiguration const TEST_PWM_Configuration + = {tFtm::PWM_EdgeAlignedetSet0, false, false, false, Io::FTM4_CH4, 0, 10000}; + +} // namespace bios diff --git a/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/io/outputPwm/outputPwmConfiguration.h b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/io/outputPwm/outputPwmConfiguration.h new file mode 100644 index 00000000000..39c9b1ab4c4 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/io/outputPwm/outputPwmConfiguration.h @@ -0,0 +1,21 @@ +// Copyright 2025 Accenture. + +#pragma once + +enum outputPwm +{ + _pwmStaticStart = 0, + dummyPwm = _pwmStaticStart, + _pwmStaticEnd, + _pwmDynamicStart = _pwmStaticEnd + + , + EVAL_LED_GREEN_PWM = _pwmDynamicStart, + EVAL_LED_BLUE_PWM, + TEST_PWM + + , + _pwmDynamicMark, + _pwmChannelMax = _pwmDynamicMark, + PORT_UNAVAILABLE = _pwmChannelMax +}; diff --git a/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/io/outputPwm/outputPwmConfigurationStrings.h b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/io/outputPwm/outputPwmConfigurationStrings.h new file mode 100644 index 00000000000..a63d4417209 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/io/outputPwm/outputPwmConfigurationStrings.h @@ -0,0 +1,6 @@ +// Copyright 2025 Accenture. + +#pragma once + +char const* const outputPwmConfigurationStrings[] + = {"dummyPwm", "eval_led_green_pwm", "eval_led_blue_pwm", "test_pwm"}; diff --git a/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/sci/sciConfiguration.h b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/sci/sciConfiguration.h new file mode 100644 index 00000000000..1f9ce28d471 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/sci/sciConfiguration.h @@ -0,0 +1,17 @@ +// Copyright 2025 Accenture. + +#pragma once + +#include "sci/SciDevice.h" + +sciBaudRate const sciBaudRateConfig[] = { + {(LPUART_BAUD_OSR(15)) + LPUART_BAUD_SBR(26)}, // = 115200 48MHz FIRC + {(LPUART_BAUD_OSR(9)) + LPUART_BAUD_SBR(8)} // = 2MBit 80MHz PLL +}; + +SciConfig const sciConfiguration + = {(LPUART1), + bios::Io::UART1_TX, + bios::Io::UART1_RX, + static_cast(sizeof(sciBaudRateConfig) / sizeof(sciBaudRate)), + sciBaudRateConfig}; diff --git a/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/timer/ftmConfiguration.hpp b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/timer/ftmConfiguration.hpp new file mode 100644 index 00000000000..a8f260368f2 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/timer/ftmConfiguration.hpp @@ -0,0 +1,46 @@ +// Copyright 2025 Accenture. + +/** + * Contains + * \file + * \ingroup bspConfig + */ + +#pragma once + +#include "ftm/Ftm.h" + +namespace bios +{ +// clang-format off + +const tFtm::tFtmConfiguration _cfgFtm4 = { + /* SC */ (0U << 16) | (1U << 3) | (1U), // 80 MHz clock /2 = 40 MHz + /* MOD */ 3000 - 1, + /* CNTIN */ 1000, + /* MODE */ 0, + /* SYNC */ 0, + /* OUTINIT */ 0, + /* OUTMASK */ 0, + /* COMBINE */ 0, + /* DEADTIME */ 0, + /* EXTTRIG */ 0, + /* POL */ 0, + /* FILTER */ 0, + /* FLTCTRL */ 0, + /* QDCTRL */ 0, + /* CONF */ 0, + /* FLTPOL */ 0, + /* SYNCONF */ 0, + /* INVCTRL */ 0, + /* SWOCTRL */ 0, + /* PWMLOAD */ 0, + /* HCR */ 0, + /* PAIR0DEADTIME */ 0, + /* PAIR1DEADTIME */ 0, + /* PAIR2DEADTIME */ 0, + /* PAIR3DEADTIME */ 0 +}; + +// clang-format on +} // namespace bios diff --git a/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/uart/UartConfig.h b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/uart/UartConfig.h new file mode 100644 index 00000000000..513126486ce --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/include/bsp/uart/UartConfig.h @@ -0,0 +1,17 @@ +#include "bsp/Uart.h" + +#include +#include + +namespace bsp +{ + +enum class Uart::Id : size_t +{ + TERMINAL, + INVALID, +}; + +static constexpr size_t NUMBER_OF_UARTS = static_cast(Uart::Id::INVALID); + +} // namespace bsp diff --git a/executables/integrationTest/platforms/s32k148evb/bspConfiguration/module.spec b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/module.spec new file mode 100644 index 00000000000..c918431ceaa --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/module.spec @@ -0,0 +1,2 @@ +unit_test: false +oss: true diff --git a/executables/integrationTest/platforms/s32k148evb/bspConfiguration/src/bsp/SystemTimer/SystemTimer.cpp b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/src/bsp/SystemTimer/SystemTimer.cpp new file mode 100644 index 00000000000..24aa8470023 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/src/bsp/SystemTimer/SystemTimer.cpp @@ -0,0 +1,111 @@ +// Copyright 2025 Accenture. + +/** + * Contains + * \file + * \ingroup bspConfig + */ +#include "bsp/timer/SystemTimer.h" + +#include "interrupts/SuspendResumeAllInterruptsScopedLock.h" +#include "mcu/mcu.h" + +namespace +{ +uint32_t const DWT_FREQ_MHZ_RUN = 80U; +uint32_t const DWT_FREQ_MHZ_IDLE = 48U; +uint32_t const TICK_FREQ_MHZ = 16U; // Common divider of all DWT frequencies + +struct +{ + uint64_t ticks; // Main ticks counter, never overflows + uint32_t lastDwt; + uint32_t dwtTicksRatio; + uint32_t dwtFreqMhz; +} state = {0, 0, DWT_FREQ_MHZ_RUN / TICK_FREQ_MHZ, DWT_FREQ_MHZ_RUN}; + +// DWT registers (refer to ARMv7-M architecture reference manual) +uint32_t volatile& DWT_CTRL = *reinterpret_cast(0xE0001000U); +uint32_t volatile& DWT_CYCCNT = *reinterpret_cast(0xE0001004U); +uint32_t volatile& DEMCR = *reinterpret_cast(0xE000EDFCU); + +// Must be called more than once per DWT period (~53 sec for 80 MHz frequency). Called implicitly +// through all getSomething() functions +uint64_t updateTicks() +{ + const ESR_UNUSED interrupts::SuspendResumeAllInterruptsScopedLock lock; + uint32_t const curDwt = DWT_CYCCNT; + state.ticks += static_cast((curDwt - state.lastDwt) / state.dwtTicksRatio); + state.lastDwt = curDwt; + return state.ticks; +} + +} // namespace + +extern "C" +{ +void initSystemTimer() +{ + const ESR_UNUSED interrupts::SuspendResumeAllInterruptsScopedLock lock; + + LPIT0->MCR = 0x1; + LPIT0->TMR[0].TCTRL = 0x00U; + LPIT0->TMR[0].TVAL = 0xFFFFFFFFU; + LPIT0->SETTEN = 0x1U; + + DEMCR = DEMCR | 0x01000000U; + DWT_CYCCNT = 0; + DWT_CTRL = DWT_CTRL | 0x00000001U; + + state.ticks = 0; // General ticks counter, never overflows + state.lastDwt = 0; + state.dwtTicksRatio = DWT_FREQ_MHZ_RUN / TICK_FREQ_MHZ; + state.dwtFreqMhz = DWT_FREQ_MHZ_RUN; +} + +void initSystemTimerHelper(bool const sleep) +{ + (void)updateTicks(); + { + const ESR_UNUSED interrupts::SuspendResumeAllInterruptsScopedLock lock; + state.dwtFreqMhz = sleep ? DWT_FREQ_MHZ_IDLE : DWT_FREQ_MHZ_RUN; + state.dwtTicksRatio = state.dwtFreqMhz / TICK_FREQ_MHZ; + } +} + +uint64_t getSystemTicks(void) { return updateTicks(); } + +uint32_t getSystemTicks32Bit(void) { return static_cast(updateTicks()); } + +uint64_t getSystemTimeNs(void) { return updateTicks() * 1000U / TICK_FREQ_MHZ; } + +uint64_t getSystemTimeUs(void) { return updateTicks() / TICK_FREQ_MHZ; } + +uint32_t getSystemTimeUs32Bit(void) { return static_cast(updateTicks() / TICK_FREQ_MHZ); } + +uint64_t getSystemTimeMs(void) { return updateTicks() / TICK_FREQ_MHZ / 1000U; } + +uint32_t getSystemTimeMs32Bit(void) +{ + return static_cast(updateTicks() / TICK_FREQ_MHZ / 1000U); +} + +uint64_t systemTicksToTimeUs(uint64_t const ticks) { return ticks / TICK_FREQ_MHZ; } + +uint64_t systemTicksToTimeNs(uint64_t const ticks) { return ticks * 1000U / TICK_FREQ_MHZ; } + +uint32_t getFastTicks(void) { return DWT_CYCCNT; } + +uint32_t getFastTicksPerSecond(void) +{ + const ESR_UNUSED interrupts::SuspendResumeAllInterruptsScopedLock lock; + return state.dwtFreqMhz * 1000000; +} + +void sysDelayUs(uint32_t const delay) +{ + uint64_t const start = getSystemTimeUs(); + while (getSystemTimeUs() < start + delay) {} +} + +} // extern "C" diff --git a/executables/integrationTest/platforms/s32k148evb/bspConfiguration/src/bsp/adc/AnalogInput.cpp b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/src/bsp/adc/AnalogInput.cpp new file mode 100644 index 00000000000..8155482c773 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/src/bsp/adc/AnalogInput.cpp @@ -0,0 +1,90 @@ +// Copyright 2025 Accenture. + +#include "bsp/adc/AnalogInput.h" + +#include "bsp/adc/AnalogInputScale.h" +#include "io/Io.h" + +#ifdef BSP_ANALOGINPUT_PIN_CONFIGURATION +#undef BSP_ANALOGINPUT_PIN_CONFIGURATION +#endif +#define BSP_ANALOGINPUT_PIN_CONFIGURATION 1 + +namespace bios +{ + +#include "bsp/adc/analogInputConfiguration.h" +#include "bsp/adc/analogInputConfigurationStrings.h" +#include "bsp/adc/analogInputScaleConfiguration.h" + +tAdc12Bit AnalogInput::fAdc0(*ADC0); + +AnalogInput::tAnalogConfiguration const* AnalogInput::fADChannelCfg = 0; + +AnalogInput::AnalogInput() { fADChannelCfg = &ADChannelCfg[0]; } + +void AnalogInput::init() +{ + AnalogInputScale::init( + static_cast( + sizeof(analogInputScaleConfiguration) / sizeof(AnalogInputScale::scale)), + &analogInputScaleConfiguration[0]); + + SIM->ADCOPT = 0U; + SIM->CHIPCTL = SIM->CHIPCTL & ~SIM_CHIPCTL_PDB_BB_SEL_MASK; + + (void)fAdc0.init(); + + for (uint16_t i = 0; i < static_cast(_AdcChannelMax); ++i) + { + if (fADChannelCfg[i].adc == ADC_0_CH) + { + (void)Io::setDefaultConfiguration(fADChannelCfg[i].pin); + fAdc0.enableChannel(fADChannelCfg[i].slot, fADChannelCfg[i].phChannel); + } + else + { + // nothing to do + } + } +} + +void AnalogInput::start() { (void)fAdc0.start(); } + +bsp::BspReturnCode AnalogInput::get(uint16_t channel, uint16_t& value) +{ + bsp::BspReturnCode ret = bsp::BSP_ERROR; + + if (fADChannelCfg[channel].adc == ADC_0_CH) + { + ret = fAdc0.getValueSync(fADChannelCfg[channel].phChannel, value); + } + + return ret; +} + +bsp::BspReturnCode AnalogInput::get(uint16_t const channel, uint32_t& value) +{ + uint16_t value16 = 0U; + bsp::BspReturnCode const ret = get(channel, value16); + value = static_cast(value16); + return ret; +} + +void AnalogInput::cyclic() {} + +void AnalogInput::stop() { (void)fAdc0.stop(); } + +char const* AnalogInput::getName(uint16_t const channel) +{ + if (channel < sizeof(adcChannelsNamingStrings) / (sizeof(char*))) + { + return adcChannelsNamingStrings[channel]; + } + else + { + return ("??? ->"); + } +} + +} // namespace bios diff --git a/executables/integrationTest/platforms/s32k148evb/bspConfiguration/src/bsp/io/outputPwm/PwmSupport.cpp b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/src/bsp/io/outputPwm/PwmSupport.cpp new file mode 100644 index 00000000000..042bcafd8a3 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/src/bsp/io/outputPwm/PwmSupport.cpp @@ -0,0 +1,91 @@ +// Copyright 2025 Accenture. + +#include "bsp/io/outputPwm/PwmSupport.h" + +#include "bsp/io/outputPwm/PwmSupportConfiguration.hpp" +#include "outputPwm/OutputPwm.h" + +namespace bios +{ +PwmSupport::PwmSupport(tFtm& ftm4) +: eval_led_green_pwm(ftm4, EVAL_LED_GREEN_PWM_Configuration) +, eval_led_blue_pwm(ftm4, EVAL_LED_BLUE_PWM_Configuration) +, test_pwm(ftm4, TEST_PWM_Configuration) +{} + +void PwmSupport::init() +{ + (void)eval_led_green_pwm.init(); + (void)eval_led_blue_pwm.init(); + (void)test_pwm.init(); + + (void)OutputPwm::setDynamicClient(OutputPwm::EVAL_LED_GREEN_PWM, 0, this); + (void)OutputPwm::setDynamicClient(OutputPwm::EVAL_LED_BLUE_PWM, 1, this); + (void)OutputPwm::setDynamicClient(OutputPwm::TEST_PWM, 2, this); +} + +void PwmSupport::start() +{ + (void)eval_led_green_pwm.start(); + (void)eval_led_blue_pwm.start(); + (void)test_pwm.start(); +} + +void PwmSupport::stop() +{ + (void)eval_led_green_pwm.stop(); + (void)eval_led_blue_pwm.stop(); + (void)test_pwm.stop(); +} + +void PwmSupport::shutdown() +{ + stop(); + + (void)OutputPwm::clrDynamicClient(OutputPwm::EVAL_LED_GREEN_PWM); + (void)OutputPwm::clrDynamicClient(OutputPwm::EVAL_LED_BLUE_PWM); + (void)OutputPwm::clrDynamicClient(OutputPwm::TEST_PWM); +} + +bsp::BspReturnCode PwmSupport::setDuty(uint16_t chan, uint16_t duty, bool /* immediateUpdate */) +{ + switch (chan) + { + case 0: eval_led_green_pwm.setDuty(eval_led_green_pwm.validDuty(duty)); break; + case 1: eval_led_blue_pwm.setDuty(eval_led_blue_pwm.validDuty(duty)); break; + case 2: test_pwm.setDuty(test_pwm.validDuty(duty)); break; + + default: return bsp::BSP_NOT_SUPPORTED; + } + return bsp::BSP_OK; +} + +/* + * Set period for specific channel. Unit: microseconds + */ +bsp::BspReturnCode PwmSupport::setPeriod(uint16_t chan, uint16_t period) +{ + switch (chan) + { + case 0: + { + (void)eval_led_green_pwm.setlPeriod(period); + break; + } + case 1: + { + (void)eval_led_blue_pwm.setlPeriod(period); + break; + } + case 2: + { + (void)test_pwm.setlPeriod(period); + break; + } + + default: return bsp::BSP_NOT_SUPPORTED; + } + return bsp::BSP_OK; +} + +} // namespace bios diff --git a/executables/integrationTest/platforms/s32k148evb/bspConfiguration/src/bsp/stdIo/stdIo.cpp b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/src/bsp/stdIo/stdIo.cpp new file mode 100644 index 00000000000..2afc3b65d43 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/src/bsp/stdIo/stdIo.cpp @@ -0,0 +1,24 @@ +// Copyright 2025 Accenture. + +#include "bsp/uart/UartConfig.h" +#include "charInputOutput/charIoSerial.h" +#include "platform/estdint.h" + +extern "C" void putByteToStdout(uint8_t const byte) +{ + static bsp::Uart& uart = bsp::Uart::getInstance(bsp::Uart::Id::TERMINAL); + uart.write(etl::span(&byte, 1U)); +} + +extern "C" int32_t getByteFromStdin() +{ + static bsp::Uart& uart = bsp::Uart::getInstance(bsp::Uart::Id::TERMINAL); + uint8_t dataByte = 0; + etl::span data(&dataByte, 1U); + uart.read(data); + if (data.size() == 0) + { + return -1; + } + return data[0]; +} diff --git a/executables/integrationTest/platforms/s32k148evb/bspConfiguration/src/bsp/uart/UartConfig.cpp b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/src/bsp/uart/UartConfig.cpp new file mode 100644 index 00000000000..773690f0264 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/bspConfiguration/src/bsp/uart/UartConfig.cpp @@ -0,0 +1,39 @@ +// Copyright 2024 Accenture. +// Copyright 2025 BMW AG + +#include +#include +#include + +namespace bsp +{ + +uint32_t const baudRateConfig[] = { + (LPUART_BAUD_OSR(15)) + LPUART_BAUD_SBR(26), // = 115200 48MHz FIRC + (LPUART_BAUD_OSR(9)) + LPUART_BAUD_SBR(8) // = 2MBit 80MHz PLL +}; + +Uart::UartConfig const Uart::_uartConfigs[] = { + { + *LPUART1, + bios::Io::UART1_TX, + bios::Io::UART1_RX, + baudRateConfig[0], + }, +}; + +static Uart instances[] = { + Uart(Uart::Id::TERMINAL), +}; + +bsp::Uart& Uart::getInstance(Id id) +{ + ETL_ASSERT( + id < Id::INVALID, ETL_ERROR_GENERIC("UartId::INVALID is not a valid Uart identifier")); + static_assert( + NUMBER_OF_UARTS == static_cast(etl::size(instances)), + "Not enough Uart instances defined"); + return instances[static_cast(id)]; +} + +} // namespace bsp diff --git a/executables/integrationTest/platforms/s32k148evb/freeRtosCoreConfiguration/CMakeLists.txt b/executables/integrationTest/platforms/s32k148evb/freeRtosCoreConfiguration/CMakeLists.txt new file mode 100644 index 00000000000..b889ec75ae0 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/freeRtosCoreConfiguration/CMakeLists.txt @@ -0,0 +1,5 @@ +add_library(freeRtosCoreConfiguration INTERFACE) + +target_include_directories(freeRtosCoreConfiguration INTERFACE include) + +target_link_libraries(freeRtosCoreConfiguration INTERFACE bsp bspMcu) diff --git a/executables/integrationTest/platforms/s32k148evb/freeRtosCoreConfiguration/include/os/FreeRtosPlatformConfig.h b/executables/integrationTest/platforms/s32k148evb/freeRtosCoreConfiguration/include/os/FreeRtosPlatformConfig.h new file mode 100644 index 00000000000..c1f300559fb --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/freeRtosCoreConfiguration/include/os/FreeRtosPlatformConfig.h @@ -0,0 +1,140 @@ +// Copyright 2025 Accenture. + +#pragma once + +/* Device-specific asyncFreeRtos configuration. + * + * This file contains the part of the FreeRTOS configuration for a specific device. + * It is included into libs/bsw/asyncFreeRtos/freeRtosConfiguration/FreeRTOSConfig.h, whose + * own content provides device-independent configuration of FreeRTOS for use with async API. + * + * For the description of the config parameters used below, + * see https://www.freertos.org/Documentation/02-Kernel/03-Supported-devices/02-Customization + */ + +#include "bsp/SystemTime.h" + +#ifdef __cplusplus +extern "C" +{ +#endif + +#define configCPU_CLOCK_HZ (80000000UL) +#define configBUS_CLOCK_HZ 40000000UL + +#undef configMINIMAL_STACK_SIZE +#define configMINIMAL_STACK_SIZE ((unsigned short)512) +#define configMAX_TASK_NAME_LEN (10) +#define configIDLE_SHOULD_YIELD 1 +#define configUSE_MUTEXES 1 +#define configQUEUE_REGISTRY_SIZE 30 +// #define configCHECK_FOR_STACK_OVERFLOW 1 +#undef configCHECK_FOR_STACK_OVERFLOW +#define configCHECK_FOR_STACK_OVERFLOW 2 // change from 1 in order to watermark check boundaries +#define configRECORD_STACK_HIGH_ADDRESS 1 // add to record pxEndOfStack max stack extension +#define configUSE_RECURSIVE_MUTEXES 1 +#define configUSE_MALLOC_FAILED_HOOK 0 +#define configUSE_APPLICATION_TASK_TAG 0 +#define configUSE_COUNTING_SEMAPHORES 1 +#define configUSE_FPU 0 +#define configNUM_THREAD_LOCAL_STORAGE_POINTERS 0 + +/* Memory allocation related definitions. */ +#define configTOTAL_HEAP_SIZE 512 +#define configAPPLICATION_ALLOCATED_HEAP 1 + +/* Co-routine definitions. */ +#define configMAX_CO_ROUTINE_PRIORITIES (0) + +/* Software timer definitions. */ +#undef configTIMER_QUEUE_LENGTH + +// Queue length for the timer task. This needs to account for all timers +// that are used across all tasks. +#define configTIMER_QUEUE_LENGTH 30 +#undef configTIMER_TASK_STACK_DEPTH +#define configTIMER_TASK_STACK_DEPTH (configMINIMAL_STACK_SIZE) + +/* Set the following definitions to 1 to include the API function, or zero +to exclude the API function. */ +#define INCLUDE_vTaskPrioritySet 1 +#define INCLUDE_uxTaskPriorityGet 1 +#define INCLUDE_vTaskDelete 1 +#define INCLUDE_vTaskCleanUpResources 1 +#define INCLUDE_vTaskSuspend 1 +#define INCLUDE_vResumeFromISR 1 +#define INCLUDE_vTaskDelayUntil 1 +#define INCLUDE_vTaskDelay 1 +#define INCLUDE_eTaskGetState 1 +#undef INCLUDE_uxTaskGetStackHighWaterMark +#define INCLUDE_uxTaskGetStackHighWaterMark 1 +#define INCLUDE_xTaskGetSchedulerState 1 +#define INCLUDE_xQueueGetMutexHolder 1 +#undef INCLUDE_xTaskGetCurrentTaskHandle +#define INCLUDE_xTaskGetCurrentTaskHandle 1 +#undef INCLUDE_xTaskGetIdleTaskHandle +#define INCLUDE_xTaskGetIdleTaskHandle 1 +#define INCLUDE_pcTaskGetTaskName 1 +#define INCLUDE_xEventGroupSetBitFromISR 1 +#undef INCLUDE_xTimerPendFunctionCall +#define INCLUDE_xTimerPendFunctionCall 1 + +/* Cortex-M specific definitions. */ +#ifdef __NVIC_PRIO_BITS +#define configPRIO_BITS __NVIC_PRIO_BITS +#else +#define configPRIO_BITS 4 +#endif + +/* The lowest interrupt priority that can be used in a call to a "set priority" +function. */ +#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 0x0F + +/* The highest interrupt priority that can be used by any interrupt service +routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL +INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER +PRIORITY THAN THIS! (higher priorities are lower numeric values. */ +#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 0x05 + +/* Interrupt priorities used by the kernel port layer itself. These are generic +to all Cortex-M ports, and do not rely on any particular library functions. */ +#ifndef configKERNEL_INTERRUPT_PRIORITY +#define configKERNEL_INTERRUPT_PRIORITY \ + (configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS)) +#endif + +/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!! +See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */ +#ifndef configMAX_SYSCALL_INTERRUPT_PRIORITY +#define configMAX_SYSCALL_INTERRUPT_PRIORITY \ + (configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS)) +#endif + +/* Definition assert() function. */ +#define DEV_ASSERT(x) +#if defined(__GNUC__) && (!defined(__ASSEMBLER__)) +#include "mcu/mcu.h" +#endif +#define configASSERT(x) DEV_ASSERT(x) + +/* Tickless Idle Mode */ +#define configUSE_TICKLESS_IDLE 0 +#define configEXPECTED_IDLE_TIME_BEFORE_SLEEP 2 +#define configUSE_TICKLESS_IDLE_DECISION_HOOK 0 + +/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS +standard names. */ +// ISR names in the interrupt weak functor table +#define vPortSVCHandler SVC_Handler +#define xPortPendSVHandler PendSV_Handler +#define xPortSysTickHandler SysTick_Handler + +#define configGENERATE_RUN_TIME_STATS (1) +#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() +#define portGET_RUN_TIME_COUNTER_VALUE() getSystemTimeUs32Bit() + +#define configTIMER_SERVICE_TASK_NAME "TIMER_OS" + +#ifdef __cplusplus +} /* extern "C" */ +#endif diff --git a/executables/integrationTest/platforms/s32k148evb/freeRtosCoreConfiguration/module.spec b/executables/integrationTest/platforms/s32k148evb/freeRtosCoreConfiguration/module.spec new file mode 100644 index 00000000000..f75191894b2 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/freeRtosCoreConfiguration/module.spec @@ -0,0 +1 @@ +oss: true \ No newline at end of file diff --git a/executables/integrationTest/platforms/s32k148evb/main/CMakeLists.txt b/executables/integrationTest/platforms/s32k148evb/main/CMakeLists.txt new file mode 100644 index 00000000000..d48412118e5 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/main/CMakeLists.txt @@ -0,0 +1,53 @@ +add_library(startUpAsm OBJECT src/bsp/bootHeader.S src/bsp/startUp.S) + +set_target_properties(startUpAsm PROPERTIES COMPILE_WARNING_AS_ERROR OFF) + +add_library(startUp "$" src/os/isr/isr_sys.cpp) + +if (BUILD_TARGET_RTOS STREQUAL "THREADX") + target_sources(startUpAsm PRIVATE src/bsp/threadx/tx_initialize_low_level.S) + target_sources(startUp PRIVATE src/bsp/threadx/tx_execution_initialize.c) + target_link_libraries(startUpAsm PRIVATE asyncCoreConfiguration) +endif () + +target_link_libraries(startUp PRIVATE bspMcu hardFaultHandler) + +add_library(main src/systems/BspSystem.cpp src/lifecycle/StaticBsp.cpp + src/main.cpp) + +target_include_directories(main PUBLIC include) + +target_link_libraries( + main + PRIVATE asyncConsole + bsp + bspClock + bspCore + bspUart + etl + lifecycle + startUp + safeBspMcuWatchdog + PUBLIC bspInputManager bspOutputManager) + +if (BUILD_TARGET_RTOS STREQUAL "FREERTOS") + target_link_libraries(main PRIVATE freeRtosCm4SysTick) + add_library(osHooks src/osHooks/freertos/osHooks.cpp) + target_include_directories(osHooks PRIVATE include) + target_link_libraries(osHooks PRIVATE freeRtosCm4SysTick) +elseif (BUILD_TARGET_RTOS STREQUAL "THREADX") + target_link_libraries(main PRIVATE threadXCortexM4) + add_library(osHooks src/osHooks/threadx/osHooks.cpp) + target_include_directories(osHooks PRIVATE include/osHooks/threadx) + target_link_libraries(osHooks PRIVATE threadXCortexM4 asyncThreadX + asyncThreadXImpl threadXConfiguration) +endif () + +set_target_properties( + startUp + PROPERTIES PROP_LINKER_SCRIPT + "${CMAKE_CURRENT_SOURCE_DIR}/linkerscript/application.dld") +set_target_properties( + startUp + PROPERTIES LINK_DEPENDS + "${CMAKE_CURRENT_SOURCE_DIR}/linkerscript/application.dld") diff --git a/executables/integrationTest/platforms/s32k148evb/main/include/lifecycle/StaticBsp.h b/executables/integrationTest/platforms/s32k148evb/main/include/lifecycle/StaticBsp.h new file mode 100644 index 00000000000..65c0813f4b4 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/main/include/lifecycle/StaticBsp.h @@ -0,0 +1,106 @@ +// Copyright 2025 Accenture. + +#pragma once + +#include "bsp/Bsp.h" +#include "bsp/adc/AnalogInput.h" +#include "bsp/io/outputPwm/PwmSupport.h" +#include "bsp/power/IEcuPowerStateController.h" +#include "eeprom/EepromDriver.h" +#include "ftm/Ftm.h" +#include "inputManager/DigitalInput.h" +#include "mcu/mcu.h" +#include "outputManager/Output.h" + +#include + +class StaticBsp +{ +public: + StaticBsp(); + + bios::IEcuPowerStateController& getPowerStateController() { return fPowerStateController; } + + eeprom::IEepromDriver& getEepromDriver() { return _eepromDriver; } + + bios::AnalogInput& getAdc() { return _adc; } + + void init(); + void shutdown(); + + void cyclic(); + + // The gate registers GENSTAT, DSOV and HBVOUT_PWMERR are usually updated every 160ms. + // If requesting the update explicitly with the following function, they are updated + // within the next 5ms. + // Note, that the registers are updated in bios task, but you can call the methods in + // application task. + void requestUpdateGateRegisters(bool const request) { _requestUpdateGateRegisters = request; } + + bool isUpdateGateRegistersRequested() const { return _requestUpdateGateRegisters; } + +private: + void hwInit(); + static void releasePins(); + + class DummyEcuPowerStateController : public bios::IEcuPowerStateController + { + public: + void startPreSleep() override {} + + uint32_t powerDown(uint8_t /* mode */, tCheckWakeupDelegate /* delegate */) override + { + return 0; + } + + uint32_t powerDown(uint8_t /* mode */) override { return 0; } + + void fullPowerUp() override {} + + void setWakeupSourceMonitoring( + uint32_t /* source */, bool /* active */ = true, bool /* fallingEdge */ = true) override + {} + + /*! + * new Interface for void setMonitorWakeUp(uint32_t wupLine, bool aktiv); + */ + void clearWakeupSourceMonitoring(uint32_t /* source */) override {} + + bool setWakeupDelegate(tCheckWakeupDelegate& /* delegate */) override { return true; } + + uint32_t getWakeupSource(void) override { return 0; } + }; + + DummyEcuPowerStateController fPowerStateController; + + uint8_t fCyclic10Msec; + + static uint32_t const WATCHDOG_TIME = 500U; // msec + eeprom::EepromDriver _eepromDriver; + bios::Output _output; + bios::DigitalInput _digitalInput; + + bios::tFtm _ftm4; + bios::PwmSupport _pwmSupport; + bios::AnalogInput _adc; + + bool _requestUpdateGateRegisters; + + typedef enum + { + _INIT_, + _REQRUN_, + _REQRUNSTEP0_, + _REQRUNSTEP1_, + _RUN_, + _REQRUNIDLE_ = 10U, + _REQRUNIDLESTEP0_, + _RUNIDLE_, + _REQSLEEP_ = 20U, + _SLEEP_, + _REQSHUTDOWN_ = 30U, + _SHUTDOWN_ + } tMode; + + tMode _mode; +}; diff --git a/executables/integrationTest/platforms/s32k148evb/main/include/osHooks/threadx/osHooks.h b/executables/integrationTest/platforms/s32k148evb/main/include/osHooks/threadx/osHooks.h new file mode 100644 index 00000000000..419f0a94b57 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/main/include/osHooks/threadx/osHooks.h @@ -0,0 +1,14 @@ +// Copyright 2025 Accenture. + +#pragma once + +extern "C" +{ +void _tx_execution_thread_enter(); + +void _tx_execution_thread_exit(); + +void tx_low_power_enter(); + +void tx_low_power_exit(); +} diff --git a/executables/integrationTest/platforms/s32k148evb/main/include/systems/BspSystem.h b/executables/integrationTest/platforms/s32k148evb/main/include/systems/BspSystem.h new file mode 100644 index 00000000000..5d5cac4229e --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/main/include/systems/BspSystem.h @@ -0,0 +1,45 @@ +// Copyright 2025 Accenture. + +#pragma once + +#include "console/AsyncCommandWrapper.h" +#include "inputManager/DigitalInputTester.h" +#include "lifecycle/SingleContextLifecycleComponent.h" +#include "lifecycle/StaticBsp.h" +#include "outputManager/OutputTester.h" +#include "outputPwm/OutputPwmTester.h" +#include "tester/AnalogTester.h" + +namespace systems +{ + +class BspSystem +: public ::lifecycle::SingleContextLifecycleComponent +, private ::async::RunnableType +{ +public: + BspSystem(::async::ContextType context, StaticBsp& staticBsp); + + void init() override; + void run() override; + void shutdown() override; + + void execute() override; + + void cyclic(); + +private: + ::async::ContextType const _context; + ::async::TimeoutType _timeout; + StaticBsp& _staticBsp; + bios::AnalogTester _analogTester; + bios::OutputPwmTester _outputPwmTester; + bios::DigitalInputTester _digitalInputTester; + bios::OutputTester _outputTester; + ::console::AsyncCommandWrapper _asyncCommandWrapper_for_analogTester; + ::console::AsyncCommandWrapper _asyncOutputPwmTester; + ::console::AsyncCommandWrapper _asyncDigitalInputTester; + ::console::AsyncCommandWrapper _asyncOutputTester; +}; + +} // namespace systems diff --git a/executables/integrationTest/platforms/s32k148evb/main/linkerscript/application.dld b/executables/integrationTest/platforms/s32k148evb/main/linkerscript/application.dld new file mode 100644 index 00000000000..c525deb730b --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/main/linkerscript/application.dld @@ -0,0 +1,332 @@ +/* Linker file for GNU C Compiler */ + +/* Entry Point */ +ENTRY(Reset_Handler) + +HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x00000200; +STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x00000400; + +/* Memory boundaries of S32K148 */ +FLASH_START = 0x00000000; +FLASH_END = 0x0017FFFF; +SRAM_L_START = 0x1FFE0000; +SRAM_L_END = 0x1FFFFFFF; +SRAM_U_START = 0x20000000; +SRAM_U_END = 0x2001EFFF; + +/* Memory areas */ +MEMORY +{ + /* Flash */ + Isr (RX) : ORIGIN = FLASH_START, LENGTH = 0x00000400 + FlashConfigField (RX) : ORIGIN = FLASH_START + 0x00000400, LENGTH = 0x00000010 + ApplicationStartUpCode (RX) : ORIGIN = FLASH_START + 0x410, LENGTH = 0x20 + Application (RX) : ORIGIN = FLASH_START + 0x430, LENGTH = FLASH_END + 1 - FLASH_START - 0x430 - 64 + CrcMeta (RX) : ORIGIN = FLASH_END + 1 - 64, LENGTH = 64 + /* SRAM_L */ + Data (RW) : ORIGIN = SRAM_L_START, LENGTH = SRAM_L_END + 1 - SRAM_L_START + /* SRAM_U */ + ApplicationRAM (RX) : ORIGIN = SRAM_U_START, LENGTH = 0x100 + NoInit (RW) : ORIGIN = SRAM_U_END + 1 - 0x400, LENGTH = 0x400 +} + +/* Output sections */ +SECTIONS +{ + .interrupts : + { + __VECTOR_TABLE = .; + . = ALIGN(4); + KEEP(*(.isr_vector)) + } > Isr + + .first : + { + __ROM_CRC_START = .; + *(.glue_7) + *(.glue_7t) + *(.eh_frame) + KEEP (*(.init)) + KEEP (*(.fini)) + . = ALIGN(0x4); + KEEP (*ecrti.o(.ctors)) + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o *ecrtn.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*crtend.o(.ctors)) + KEEP (*ecrtn.o(.ctors)) + . = ALIGN(0x4); + KEEP (*ecrti.o(.dtors)) + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o *ecrtn.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*crtend.o(.dtors)) + KEEP (*ecrtn.o(.dtors)) + *(.rodata) + *(.text.__assert_func) + *(.text.__exec_ctors) + *(.text.SystemInit) + *(.text.__aeabi_atexit) + *(.text.__cxa_pure_virtual) + *(.text._ZSt9terminatev) + *(.text.__cxa_atexit) + *(.text.__libc_init_array) + *(.text._raise_r) + *(.text._getpid_r) + *(.text.abort*) + *(.text.memcpy) + *(.text.memset) + *(.text.raise) + . = ALIGN(32); + } + > Application = 0xffffffff + + .FlashConfigField : + { + . = ALIGN(4); + KEEP(*(.FlashConfig)) /* Flash Configuration Field (FCF) */ + . = ALIGN(4); + } > FlashConfigField + + .__startUpSection : + { + KEEP(*(.__startUpSection)) + } + > ApplicationStartUpCode + + /* Program code */ + + .text : + { + *(.text._kill_r) + *(.text._getpid) + *(.text._kill) + *(.text._exit) + . = ALIGN(4); + *(.text) + *(.text*) + *(.rodata) + *(.rodata*) + . = ALIGN(4); + } + > Application = 0xffffffff + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } + > Application = 0xffffffff + + .ARM : + { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } + > Application = 0xffffffff + + /* Constructors and destructors */ + + .ctors : + { + __CTOR_LIST__ = .; + KEEP (*crtbegin.o(.ctors)) + KEEP (*crtbegin?.o(.ctors)) + KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + __CTOR_END__ = .; + } + > Application = 0xffffffff + + .dtors : + { + __DTOR_LIST__ = .; + KEEP (*crtbegin.o(.dtors)) + KEEP (*crtbegin?.o(.dtors)) + KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + __DTOR_END__ = .; + } + > Application = 0xffffffff + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } + > Application = 0xffffffff + + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } + > Application = 0xffffffff + + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + __ROM_CRC_END = .; + } + > Application = 0xffffffff + + __etext = .; /* end of code */ + __DATA_ROM = .; + + .mpu_data : + { + . = ALIGN(32); + __MPU_DATA_START = .; + KEEP("*libsafe*:*"(.data)) + KEEP("*libsafe*:*"(.data*)) + . = ALIGN(32); + __MPU_DATA_END = .; + } > Data + + .mpu_rodata : + { + . = ALIGN(32); + __MPU_RODATA_START = .; + KEEP("*libsafe*:*"(.rodata)) + KEEP("*libsafe*:*"(.rodata*)) + . = ALIGN(32); + __MPU_RODATA_END = .; + } > Data + + .mpu_bss : + { + . = ALIGN(32); + __MPU_BSS_START = .; + "*libsafe*:*"(.bss) + "*libsafe*:*"(.bss*) + . = ALIGN(32); + __MPU_BSS_END = .; + } > Data + + /* Initialized data */ + + .data : AT(__DATA_ROM) + { + . = ALIGN(4); + __DATA_RAM = .; + __data_start__ = .; + *(.data) + *(.data*) + KEEP(*(.jcr*)) + . = ALIGN(4); + __data_end__ = .; + } > Data + + /* Compute start of executable code in ROM, necessary to be executed + * from RAM */ + __DATA_ROM_RX = __DATA_ROM + (__data_end__ - __data_start__); + + .launchFromRAM : AT(__DATA_ROM_RX) + { + . = ALIGN(4); + __LAUNCH_FROM_RAM_START = .; + KEEP(*(.launchFromRAM)) + KEEP(*(.launchFromRAM*)) + . = ALIGN(4); + __LAUNCH_FROM_RAM_END = .; + } + > ApplicationRAM = 0xffffffff + + ___data_size = __data_end__ - __data_start__; + ___data_rx_size = __LAUNCH_FROM_RAM_END - __LAUNCH_FROM_RAM_START; + + __DATA_ROM_START = __DATA_ROM; + __DATA_ROM_END = __DATA_ROM + ___data_size + ___data_rx_size; + __USED_FLASH_END = __DATA_ROM_END; + + /* Uninitialized data */ + + .bss : + { + . = ALIGN(4); + __START_BSS = .; + __bss_start__ = .; + *(.bss) + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + __END_BSS = .; + } > Data + + __CRC_IVT_START = ADDR(.interrupts); + __CRC_IVT_END = ADDR(.interrupts) + SIZEOF(.interrupts); + __CRC_APP_START = __ROM_CRC_START; + __CRC_APP_END = __ROM_CRC_END; + __CRC_DATA_ROM_START = __DATA_ROM_START; + __CRC_DATA_ROM_END = __DATA_ROM_END; + .checksum : + { + . = ALIGN(4); + __checksum_list_start = .; + LONG(3) /* Number of Areas */ + LONG(__CRC_IVT_START) + LONG(__CRC_IVT_END) + LONG(__CRC_APP_START) + LONG(__CRC_APP_END) + LONG(__CRC_DATA_ROM_START) + LONG(__CRC_DATA_ROM_END) + __checksum_list_end = .; + __checksum_result = .; + LONG(0x12345678) + } > CrcMeta + + /* Heap */ + + .heap : + { + . = ALIGN(8); + __end__ = .; + _end = .; + PROVIDE(end = .); + __HeapBase = .; + . += HEAP_SIZE; + __HeapLimit = .; + } > Data + + /* Stack */ + + .stack : + { + . = ALIGN(8); + . += STACK_SIZE; + __StackTop = .; + } > Data + + /* No-init RAM */ + + .NoInit (NOLOAD): + { + __DATA_RAM_END = .; /* RAM initialization is done until __DATA_RAM_END */ + __NOINIT_DATA = .; + } > NoInit + + __StackLimit = __StackTop - STACK_SIZE; + PROVIDE(__stack = __StackTop); + .ARM.attributes 0 : { *(.ARM.attributes) } +} + +/* Informational symbols */ + +__FLASH_START = FLASH_START; +__FLASH_END = FLASH_END; +__USED_FLASH_SIZE = __USED_FLASH_END - __FLASH_START; +__FREE_FLASH_SIZE = __FLASH_END - __USED_FLASH_END; +__FLASH_OVERFLOW_SIZE = __USED_FLASH_END - __FLASH_END; + +ASSERT(__MPU_DATA_START == __MPU_DATA_END, "safety code must not have preinitialized data"); +ASSERT(__MPU_RODATA_START == __MPU_RODATA_END, "safety code must not have preinitialized rodata"); diff --git a/executables/integrationTest/platforms/s32k148evb/main/module.spec b/executables/integrationTest/platforms/s32k148evb/main/module.spec new file mode 100644 index 00000000000..f75191894b2 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/main/module.spec @@ -0,0 +1 @@ +oss: true \ No newline at end of file diff --git a/executables/integrationTest/platforms/s32k148evb/main/src/bsp/bootHeader.S b/executables/integrationTest/platforms/s32k148evb/main/src/bsp/bootHeader.S new file mode 100644 index 00000000000..52360ef75cf --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/main/src/bsp/bootHeader.S @@ -0,0 +1,20 @@ + + .syntax unified + .arch armv7-m + + .section .bootHeader, "a" + .align 2 + .globl __bootHeader + +__bootHeader: + .long __PATTERN1 /* 00h: */ + .long __start+1 /* 04h: */ + .long __PATTERN2 /* 08h: */ + .long __PATTERN2 /* 0Ch: */ + + .long __PATTERN2 /* 10h: __PATTERN3 */ + .long __PATTERN2 /* 14h: */ + .long __PATTERN2 /* 18h: */ + .long __PATTERN2 /* 1Ch: */ + + .size __bootHeader, . - __bootHeader diff --git a/executables/integrationTest/platforms/s32k148evb/main/src/bsp/startUp.S b/executables/integrationTest/platforms/s32k148evb/main/src/bsp/startUp.S new file mode 100644 index 00000000000..f287900b498 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/main/src/bsp/startUp.S @@ -0,0 +1,502 @@ + +/*****************************************************************************/ +/* Version: GCC for ARM Embedded Processors */ +/*****************************************************************************/ + .syntax unified + .arch armv7-m + + .section .isr_vector, "a" + .align 2 + .globl __isr_vector +__isr_vector: + .long __StackTop /* Top of Stack */ + .long Reset_Handler /* Reset Handler */ + .long DefaultISR /* NMI_Handler NMI Handler */ + .long HardFault_Handler /* Hard Fault Handler */ + .long DefaultISR /* MemManage_Handler MPU Fault Handler */ + .long BusFault_Handler /* Bus Fault Handler */ + .long UsageFault_Handler /* Usage Fault Handler */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long SVC_Handler /* SVCall Handler */ + .long DefaultISR /* DebugMon_Handler Debug Monitor Handler */ + .long 0 /* Reserved */ + .long PendSV_Handler /* PendSV Handler */ + .long SysTick_Handler /* SysTick Handler */ + + /* External Interrupts */ + .long DefaultISR /* DMA0_IRQHandler DMA channel 0 transfer complete */ + .long DefaultISR /* DMA1_IRQHandler DMA channel 1 transfer complete */ + .long DefaultISR /* DMA2_IRQHandler DMA channel 2 transfer complete */ + .long DefaultISR /* DMA3_IRQHandler DMA channel 3 transfer complete */ + .long DefaultISR /* DMA4_IRQHandler DMA channel 4 transfer complete */ + .long DefaultISR /* DMA5_IRQHandler DMA channel 5 transfer complete */ + .long DefaultISR /* DMA6_IRQHandler DMA channel 6 transfer complete */ + .long DefaultISR /* DMA7_IRQHandler DMA channel 7 transfer complete */ + .long DefaultISR /* DMA8_IRQHandler DMA channel 8 transfer complete */ + .long DefaultISR /* DMA9_IRQHandler DMA channel 9 transfer complete */ + .long DefaultISR /* DMA10_IRQHandler DMA channel 10 transfer complete */ + .long DefaultISR /* DMA11_IRQHandler DMA channel 11 transfer complete */ + .long DefaultISR /* DMA12_IRQHandler DMA channel 12 transfer complete */ + .long DefaultISR /* DMA13_IRQHandler DMA channel 13 transfer complete */ + .long DefaultISR /* DMA14_IRQHandler DMA channel 14 transfer complete */ + .long DefaultISR /* DMA15_IRQHandler DMA channel 15 transfer complete */ + .long DefaultISR /* DMA_Error_IRQHandler DMA error interrupt channels 0-15 */ + .long DefaultISR /* MCM_IRQHandler FPU sources */ + .long DefaultISR /* FTFC_IRQHandler FTFC Command complete */ + .long DefaultISR /* Read_Collision_IRQHandler FTFC Read collision */ + .long DefaultISR /* LVD_LVW_IRQHandler PMC Low voltage detect interrupt */ + .long DefaultISR /* FTFC Double bit fault detect */ + .long DefaultISR /* WDOG_EWM_IRQHandler Single interrupt vector for WDOG and EWM */ + .long DefaultISR /* RCM_IRQHandler RCM Asynchronous Interrupt */ + .long DefaultISR /* LPI2C0_Master_IRQHandler LPI2C0 Master Interrupt */ + .long DefaultISR /* LPI2C0_Slave_IRQHandler LPI2C0 Slave Interrupt */ + .long DefaultISR /* LPSPI0_IRQHandler LPSPI0 Interrupt */ + .long DefaultISR /* LPSPI1_IRQHandler LPSPI1 Interrupt */ + .long DefaultISR /* LPSPI2_IRQHandler LPSPI2 Interrupt */ + .long DefaultISR /* Reserved45_IRQHandler Reserved Interrupt 45 */ + .long DefaultISR /* Reserved46_IRQHandler Reserved Interrupt 46 */ + .long DefaultISR /* UNUSED LPUART0 Transmit / Receive Interrupt */ + .long DefaultISR /* Reserved48_IRQHandler Reserved Interrupt 48 */ + .long DefaultISR /* UNUSED LPUART1 Transmit / Receive Interrupt */ + .long DefaultISR /* Reserved50_IRQHandler Reserved Interrupt 50 */ + .long DefaultISR /* UNUSED LPUART2 Transmit / Receive Interrupt */ + .long DefaultISR /* Reserved52_IRQHandler Reserved Interrupt 52 */ + .long DefaultISR /* Reserved53_IRQHandler Reserved Interrupt 53 */ + .long DefaultISR /* Reserved54_IRQHandler Reserved Interrupt 54 */ + .long DefaultISR /* ADC0_IRQHandler ADC0 interrupt request. */ + .long DefaultISR /* ADC1_IRQHandler ADC1 interrupt request. */ + .long DefaultISR /* CMP0_IRQHandler CMP0 interrupt request */ + .long DefaultISR /* Reserved58_IRQHandler Reserved Interrupt 58 */ + .long DefaultISR /* Reserved59_IRQHandler Reserved Interrupt 59 */ + .long DefaultISR /* ERM_single_fault_IRQHandler ERM single bit error correction */ + .long DefaultISR /* ERM double bit error non-correctable */ + .long DefaultISR /* RTC_IRQHandler RTC alarm interrupt */ + .long DefaultISR /* RTC_Seconds_IRQHandler RTC seconds interrupt */ + .long DefaultISR /* LPIT0_Ch0_IRQHandler LPIT0 channel 0 overflow interrupt */ + .long DefaultISR /* LPIT0_Ch1_IRQHandler LPIT0 channel 1 overflow interrupt */ + .long DefaultISR /* LPIT0_Ch2_IRQHandler LPIT0 channel 2 overflow interrupt */ + .long DefaultISR /* LPIT0_Ch3_IRQHandler LPIT0 channel 3 overflow interrupt */ + .long DefaultISR /* PDB0_IRQHandler PDB0 interrupt */ + .long DefaultISR /* Reserved69_IRQHandler Reserved Interrupt 69 */ + .long DefaultISR /* Reserved70_IRQHandler Reserved Interrupt 70 */ + .long DefaultISR /* Reserved71_IRQHandler Reserved Interrupt 71 */ + .long DefaultISR /* Reserved72_IRQHandler Reserved Interrupt 72 */ + .long DefaultISR /* SCG_IRQHandler SCG bus interrupt request */ + .long DefaultISR /* LPTMR0_IRQHandler LPTIMER interrupt request */ + .long DefaultISR /* PORTA_IRQHandler Port A pin detect interrupt */ + .long DefaultISR /* PORTB_IRQHandler Port B pin detect interrupt */ + .long DefaultISR /* PORTC_IRQHandler Port C pin detect interrupt */ + .long DefaultISR /* PORTD_IRQHandler Port D pin detect interrupt */ + .long DefaultISR /* PORTE_IRQHandler Port E pin detect interrupt */ + .long DefaultISR /* SWI_IRQHandler Software interrupt */ + .long DefaultISR /* Reserved81_IRQHandler Reserved Interrupt 81 */ + .long DefaultISR /* Reserved82_IRQHandler Reserved Interrupt 82 */ + .long DefaultISR /* Reserved83_IRQHandler Reserved Interrupt 83 */ + .long DefaultISR /* PDB1_IRQHandler PDB1 interrupt */ + .long DefaultISR /* FLEXIO_IRQHandler FlexIO Interrupt */ + .long DefaultISR /* Reserved86_IRQHandler Reserved Interrupt 86 */ + .long DefaultISR /* Reserved87_IRQHandler Reserved Interrupt 87 */ + .long DefaultISR /* Enet_1588_Timer_IRQHandler Reserved Interrupt 88 */ + .long DefaultISR /* Enet_TX_Buffer_IRQHandler /* Reserved Interrupt 89*/ + .long DefaultISR /* Enet_RX_Buffer_IRQHandler /* Reserved Interrupt 90*/ + .long DefaultISR /* Enet_PayloadReceiveError_IRQHandler /* Reserved Interrupt 91*/ + .long DefaultISR /* Enet_GracefulStop_IRQHandler Reserved Interrupt 92 */ + .long DefaultISR /* Enet_WakeFromSleep_IRQHandler Reserved Interrupt 93 */ + .long DefaultISR /* CAN0_ORed_IRQHandler CAN0 OR'ed [Bus Off OR Transmit Warning OR Receive Warning] */ + .long DefaultISR /* CAN0_Error_IRQHandler CAN0 Interrupt indicating that errors were detected on the CAN bus */ + .long DefaultISR /* CAN0_Wake_Up_IRQHandler CAN0 Interrupt asserted when Pretended Networking operation is enabled, and a valid message matches the selected filter criteria during Low Power mode */ + .long DefaultISR /* CAN0 OR'ed Message buffer (0-15) */ + .long DefaultISR /* CAN0 OR'ed Message buffer (16-31) */ + .long DefaultISR /* Reserved99_IRQHandler Reserved Interrupt 99 */ + .long DefaultISR /* Reserved100_IRQHandler Reserved Interrupt 100 */ + .long DefaultISR /* CAN1_ORed_IRQHandler CAN1 OR'ed [Bus Off OR Transmit Warning OR Receive Warning] */ + .long DefaultISR /* CAN1_Error_IRQHandler CAN1 Interrupt indicating that errors were detected on the CAN bus */ + .long DefaultISR /* Reserved103_IRQHandler Reserved Interrupt 103 */ + .long DefaultISR /* CAN1_ORed_0_15_MB_IRQHandler CAN1 OR'ed Interrupt for Message buffer (0-15) */ + .long DefaultISR /* CAN1_ORed_16_31_MB_IRQHandler CAN1 OR'ed Interrupt for Message buffer (16-31) */ + .long DefaultISR /* Reserved106_IRQHandler Reserved Interrupt 106 */ + .long DefaultISR /* Reserved107_IRQHandler Reserved Interrupt 107 */ + .long DefaultISR /* CAN2_ORed_IRQHandler CAN2 OR'ed [Bus Off OR Transmit Warning OR Receive Warning] */ + .long DefaultISR /* CAN2_Error_IRQHandler CAN2 Interrupt indicating that errors were detected on the CAN bus */ + .long DefaultISR /* Reserved110_IRQHandler Reserved Interrupt 110 */ + .long DefaultISR /* CAN2_ORed_0_15_MB_IRQHandler CAN2 OR'ed Message buffer (0-15) */ + .long DefaultISR /* Reserved112_IRQHandler Reserved Interrupt 112 */ + .long DefaultISR /* Reserved113_IRQHandler Reserved Interrupt 113 */ + .long DefaultISR /* Reserved114_IRQHandler Reserved Interrupt 114 */ + .long DefaultISR /* FTM0 Channel 0 and 1 interrupt */ + .long DefaultISR /* FTM0 Channel 2 and 3 interrupt */ + .long DefaultISR /* FTM0 Channel 4 and 5 interrupt */ + .long DefaultISR /* FTM0_Ch6_Ch7_IRQHandler FTM0 Channel 6 and 7 interrupt */ + .long DefaultISR /* FTM0_Fault_IRQHandler FTM0 Fault interrupt */ + .long DefaultISR /* FTM0 Counter overflow and Reload interrupt */ + .long DefaultISR /* FTM1_Ch0_Ch1_IRQHandler FTM1 Channel 0 and 1 interrupt */ + .long DefaultISR /* FTM1_Ch2_Ch3_IRQHandler FTM1 Channel 2 and 3 interrupt */ + .long DefaultISR /* FTM1_Ch4_Ch5_IRQHandler FTM1 Channel 4 and 5 interrupt */ + .long DefaultISR /* FTM1_Ch6_Ch7_IRQHandler FTM1 Channel 6 and 7 interrupt */ + .long DefaultISR /* FTM1_Fault_IRQHandler FTM1 Fault interrupt */ + .long DefaultISR /* FTM1_Ovf_Reload_IRQHandler FTM1 Counter overflow and Reload interrupt */ + .long DefaultISR /* FTM2_Ch0_Ch1_IRQHandler FTM2 Channel 0 and 1 interrupt */ + .long DefaultISR /* FTM2_Ch2_Ch3_IRQHandler FTM2 Channel 2 and 3 interrupt */ + .long DefaultISR /* FTM2_Ch4_Ch5_IRQHandler FTM2 Channel 4 and 5 interrupt */ + .long DefaultISR /* FTM2_Ch6_Ch7_IRQHandler FTM2 Channel 6 and 7 interrupt */ + .long DefaultISR /* FTM2_Fault_IRQHandler FTM2 Fault interrupt */ + .long DefaultISR /* FTM2_Ovf_Reload_IRQHandler FTM2 Counter overflow and Reload interrupt */ + .long DefaultISR /* FTM3_Ch0_Ch1_IRQHandler FTM3 Channel 0 and 1 interrupt */ + .long DefaultISR /* FTM3_Ch2_Ch3_IRQHandler FTM3 Channel 2 and 3 interrupt */ + .long DefaultISR /* FTM3_Ch4_Ch5_IRQHandler FTM3 Channel 4 and 5 interrupt */ + .long DefaultISR /* FTM3_Ch6_Ch7_IRQHandler FTM3 Channel 6 and 7 interrupt */ + .long DefaultISR /* FTM3_Fault_IRQHandler FTM3 Fault interrupt */ + .long DefaultISR /* FTM3_Ovf_Reload_IRQHandler FTM3 Counter overflow and Reload interrupt */ + .long DefaultISR /* FTM4_Ch0_Ch1_IRQHandler FTM4 Channel 0 and 1 interrupt */ + .long DefaultISR /* FTM4_Ch2_Ch3_IRQHandler FTM4 Channel 2 and 3 interrupt */ + .long DefaultISR /* FTM4_Ch4_Ch5_IRQHandler FTM4 Channel 4 and 5 interrupt */ + .long DefaultISR /* FTM4_Ch6_Ch7_IRQHandler FTM4 Channel 6 and 7 interrupt */ + .long DefaultISR /* FTM4_Fault_IRQHandler FTM4 Fault interrupt */ + .long DefaultISR /* FTM4_Ovf_Reload_IRQHandler FTM4 Counter overflow and Reload interrupt */ + .long DefaultISR /* FTM5_Ch0_Ch1_IRQHandler FTM5 Channel 0 and 1 interrupt */ + .long DefaultISR /* FTM5_Ch2_Ch3_IRQHandler FTM5 Channel 2 and 3 interrupt */ + .long DefaultISR /* FTM5_Ch4_Ch5_IRQHandler FTM5 Channel 4 and 5 interrupt */ + .long DefaultISR /* FTM5_Ch6_Ch7_IRQHandler FTM5 Channel 6 and 7 interrupt */ + .long DefaultISR /* FTM5_Fault_IRQHandler FTM5 Fault interrupt */ + .long DefaultISR /* FTM5_Ovf_Reload_IRQHandler FTM5 Counter overflow and Reload interrupt */ + .long DefaultISR /* 151 */ + .long DefaultISR /* 152 */ + .long DefaultISR /* 153 */ + .long DefaultISR /* 154 */ + .long DefaultISR /* 155 */ + .long DefaultISR /* 156 */ + .long DefaultISR /* 157 */ + .long DefaultISR /* 158 */ + .long DefaultISR /* 159 */ + .long DefaultISR /* 160 */ + .long DefaultISR /* 161 */ + .long DefaultISR /* 162 */ + .long DefaultISR /* 163 */ + .long DefaultISR /* 164 */ + .long DefaultISR /* 165 */ + .long DefaultISR /* 166 */ + .long DefaultISR /* 167 */ + .long DefaultISR /* 168 */ + .long DefaultISR /* 169 */ + .long DefaultISR /* 170 */ + .long DefaultISR /* 171 */ + .long DefaultISR /* 172 */ + .long DefaultISR /* 173 */ + .long DefaultISR /* 174 */ + .long DefaultISR /* 175 */ + .long DefaultISR /* 176 */ + .long DefaultISR /* 177 */ + .long DefaultISR /* 178 */ + .long DefaultISR /* 179 */ + .long DefaultISR /* 180 */ + .long DefaultISR /* 181 */ + .long DefaultISR /* 182 */ + .long DefaultISR /* 183 */ + .long DefaultISR /* 184 */ + .long DefaultISR /* 185 */ + .long DefaultISR /* 186 */ + .long DefaultISR /* 187 */ + .long DefaultISR /* 188 */ + .long DefaultISR /* 189 */ + .long DefaultISR /* 190 */ + .long DefaultISR /* 191 */ + .long DefaultISR /* 192 */ + .long DefaultISR /* 193 */ + .long DefaultISR /* 194 */ + .long DefaultISR /* 195 */ + .long DefaultISR /* 196 */ + .long DefaultISR /* 197 */ + .long DefaultISR /* 198 */ + .long DefaultISR /* 199 */ + .long DefaultISR /* 200 */ + .long DefaultISR /* 201 */ + .long DefaultISR /* 202 */ + .long DefaultISR /* 203 */ + .long DefaultISR /* 204 */ + .long DefaultISR /* 205 */ + .long DefaultISR /* 206 */ + .long DefaultISR /* 207 */ + .long DefaultISR /* 208 */ + .long DefaultISR /* 209 */ + .long DefaultISR /* 210 */ + .long DefaultISR /* 211 */ + .long DefaultISR /* 212 */ + .long DefaultISR /* 213 */ + .long DefaultISR /* 214 */ + .long DefaultISR /* 215 */ + .long DefaultISR /* 216 */ + .long DefaultISR /* 217 */ + .long DefaultISR /* 218 */ + .long DefaultISR /* 219 */ + .long DefaultISR /* 220 */ + .long DefaultISR /* 221 */ + .long DefaultISR /* 222 */ + .long DefaultISR /* 223 */ + .long DefaultISR /* 224 */ + .long DefaultISR /* 225 */ + .long DefaultISR /* 226 */ + .long DefaultISR /* 227 */ + .long DefaultISR /* 228 */ + .long DefaultISR /* 229 */ + .long DefaultISR /* 230 */ + .long DefaultISR /* 231 */ + .long DefaultISR /* 232 */ + .long DefaultISR /* 233 */ + .long DefaultISR /* 234 */ + .long DefaultISR /* 235 */ + .long DefaultISR /* 236 */ + .long DefaultISR /* 237 */ + .long DefaultISR /* 238 */ + .long DefaultISR /* 239 */ + .long DefaultISR /* 240 */ + .long DefaultISR /* 241 */ + .long DefaultISR /* 242 */ + .long DefaultISR /* 243 */ + .long DefaultISR /* 244 */ + .long DefaultISR /* 245 */ + .long DefaultISR /* 246 */ + .long DefaultISR /* 247 */ + .long DefaultISR /* 248 */ + .long DefaultISR /* 249 */ + .long DefaultISR /* 250 */ + .long DefaultISR /* 251 */ + .long DefaultISR /* 252 */ + .long DefaultISR /* 253 */ + .long DefaultISR /* 254 */ + .long 0xFFFFFFFF /* Reserved for user TRIM value */ + + .size __isr_vector, . - __isr_vector + + .section .text // , "a" // has no effect for gcc compiler + .equ _NVIC_ICER, 0xE000E180 + .equ _NVIC_ICPR, 0xE000E280 + .equ _NVIC_VTOR, 0xE000ED08 + .equ _CPACR, 0xE000ED88 + .text + .thumb + +/* Reset Handler */ + + .thumb_func + .align 2 + .globl Reset_Handler + .type Reset_Handler, %function + +Reset_Handler: + + cpsid i /* Mask interrupts */ + ldr r0, =_NVIC_ICER /* Disable interrupts and clear pending flags */ + ldr r1, =_NVIC_ICPR + ldr r2, =0xFFFFFFFF + str r2, [r0] /* NVIC_ICER - clear enable IRQ register 0x00 */ + str r2, [r1] /* NVIC_ICPR - clear pending IRQ register 0x00 */ + + str r2, [r0,#4]! /* NVIC_ICER - clear enable IRQ register 0x04 */ + str r2, [r1,#4]! /* NVIC_ICPR - clear pending IRQ register 0x04 */ + + str r2, [r0,#4]! /* NVIC_ICER - clear enable IRQ register 0x08 */ + str r2, [r1,#4]! /* NVIC_ICPR - clear pending IRQ register 0x08 */ + + str r2, [r0,#4]! /* NVIC_ICER - clear enable IRQ register 0x0c */ + str r2, [r1,#4]! /* NVIC_ICPR - clear pending IRQ register 0x0c */ + + str r2, [r0,#4]! /* NVIC_ICER - clear enable IRQ register 0x10 */ + str r2, [r1,#4]! /* NVIC_ICPR - clear pending IRQ register 0x10 */ + + str r2, [r0,#4]! /* NVIC_ICER - clear enable IRQ register 0x14 */ + str r2, [r1,#4]! /* NVIC_ICPR - clear pending IRQ register 0x14 */ + + str r2, [r0,#4]! /* NVIC_ICER - clear enable IRQ register 0x18 */ + str r2, [r1,#4]! /* NVIC_ICPR - clear pending IRQ register 0x18 */ + + str r2, [r0,#4]! /* NVIC_ICER - clear enable IRQ register 0x1c */ + str r2, [r1,#4]! /* NVIC_ICPR - clear pending IRQ register 0x1c */ +/* ISR reloction */ + ISB + DSB + DMB + ldr r0, =_NVIC_VTOR + ldr r1, =__isr_vector + str r1, [r0] + ldr r0, [r1] + mov sp, r0 + ldr r0, [r1, #4] + ISB + DSB + DMB + + /* enable fpu */ + ldr r0, = _CPACR + ldr r1, [r0] + orr r1, r1, #0x00F00000 + str r1, [r0] + + /* Init the rest of the registers */ + ldr r1,=0 + ldr r2,=0 + ldr r3,=0 + ldr r4,=0 + ldr r5,=0 + ldr r6,=0 + ldr r7,=0 + mov r8,r7 + mov r9,r7 + mov r10,r7 + mov r11,r7 + mov r12,r7 + /* Initialize the stack pointer */ + ldr r0,=__StackTop + mov r13,r0 +/* c code call stack init . */ + subs r0, 32 + str r1, [r0,r3] /*0*/ + movs r3, #4 + str r1, [r0,r3] /*4*/ + add r0, r0, r3 + str r1, [r0,r3] /*8*/ + add r0, r0, r3 + str r1, [r0,r3] /*12*/ + add r0, r0, r3 + str r1, [r0,r3] /*16*/ + add r0, r0, r3 + str r1, [r0,r3] /*20*/ + add r0, r0, r3 + str r1, [r0,r3] /*24*/ + add r0, r0, r3 + str r1, [r0,r3] /*28*/ + + bl boardInit + + cpsie i /* Unmask interrupts */ + + /* Init ECC RAM */ + + ldr r1, =__DATA_RAM + ldr r2, =__DATA_RAM_END + + subs r2, r1 + ble .LC5 + + movs r0, 0 + movs r3, #4 +.LC4: + str r0, [r1] + add r1, r1, r3 + subs r2, 4 + bgt .LC4 +.LC5: + +/* Loop to copy data from read only memory to RAM. The ranges + * of copy from/to are specified by following symbols evaluated in + * linker script. + * __etext: End of code section, i.e., begin of data sections to copy from. + * __data_start__/__data_end__: RAM address range that data should be + * copied to. Both must be aligned to 4 bytes boundary. */ + + ldr r1, =__etext + ldr r2, =__data_start__ + ldr r3, =__data_end__ + + subs r3, r2 + ble .LC0 + +.LC1: + subs r3, 4 + ldr r0, [r1,r3] + str r0, [r2,r3] + bgt .LC1 +.LC0: + +/* Loop to copy code from read only memory to RAM. The ranges + * of copy from/to are specified by following symbols evaluated in + * linker script. + * __DATA_ROM_RX: Start of executable code on ROM to copy i.e., begin + * of launchFromRAM section to copy from. + * __LAUNCH_FROM_RAM_START/__LAUNCH_FROM_RAM_END: RAM address range that + * data should be copied to. Both must be aligned to 4 bytes boundary. */ + + ldr r1, =__DATA_ROM_RX + ldr r2, =__LAUNCH_FROM_RAM_START + ldr r3, =__LAUNCH_FROM_RAM_END + + subs r3, r2 + ble .L2C0 + +.L2C1: + subs r3, 4 + ldr r0, [r1,r3] + str r0, [r2,r3] + bgt .L2C1 +.L2C0: + +/* This part of work usually is done in C library startup code. Otherwise, + * define this macro to enable it in this startup. + * + * Loop to zero out BSS section, which uses following symbols + * in linker script: + * __bss_start__: start of BSS section. Must align to 4 + * __bss_end__: end of BSS section. Must align to 4 + */ + ldr r1, =__bss_start__ + ldr r2, =__bss_end__ + + subs r2, r1 + ble .LC3 + + movs r0, 0 +.LC2: + str r0, [r1, r2] + subs r2, 4 + bge .LC2 +.LC3: + +/* + * Zero out the MPU protected BSS section + */ + ldr r1, =__MPU_BSS_START + ldr r2, =__MPU_BSS_END + + subs r2, r1 + ble .LC7 + + movs r0, 0 +.LC6: + str r0, [r1, r2] + subs r2, 4 + bge .LC6 +.LC7: + +#ifndef __START +#define __START _start +#endif + bl __libc_init_array + + bl main /*__START*/ + .pool + .size Reset_Handler, . - Reset_Handler + + + .align 1 + .thumb_func + .weak DefaultISR + .type DefaultISR, %function +DefaultISR: + b DefaultISR + .size DefaultISR, . - DefaultISR + +Exception: + cpsid i /* Mask interrupts */ + b Exception + + .section .__startUpSection, "a" + .thumb_func + .align 2 + .globl __start +__start: + ldr r2, =Reset_Handler + bx r2 + +.end diff --git a/executables/integrationTest/platforms/s32k148evb/main/src/bsp/threadx/tx_execution_initialize.c b/executables/integrationTest/platforms/s32k148evb/main/src/bsp/threadx/tx_execution_initialize.c new file mode 100644 index 00000000000..2c324a6501d --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/main/src/bsp/threadx/tx_execution_initialize.c @@ -0,0 +1,9 @@ +// Copyright 2025 Accenture. + +/* + * Custom profiling initialization function + * + * Do not remove! This is called by ThreadX core just before its scheduler runs + * if TX_ENABLE_EXECUTION_CHANGE_NOTIFY is defined. + */ +void _tx_execution_initialize() { return; } diff --git a/executables/integrationTest/platforms/s32k148evb/main/src/bsp/threadx/tx_initialize_low_level.S b/executables/integrationTest/platforms/s32k148evb/main/src/bsp/threadx/tx_initialize_low_level.S new file mode 100644 index 00000000000..36b00175355 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/main/src/bsp/threadx/tx_initialize_low_level.S @@ -0,0 +1,176 @@ +@/*************************************************************************** +@ * Copyright (c) 2024 Microsoft Corporation +@ * +@ * This program and the accompanying materials are made available under the +@ * terms of the MIT License which is available at +@ * https://opensource.org/licenses/MIT. +@ * +@ * SPDX-License-Identifier: MIT +@ **************************************************************************/ +@ +@ +@/**************************************************************************/ +@/**************************************************************************/ +@/** */ +@/** ThreadX Component */ +@/** */ +@/** Initialize */ +@/** */ +@/**************************************************************************/ +@/**************************************************************************/ +@ +@ +#include "async/Config.h" + + .global _tx_thread_system_stack_ptr + .global _tx_initialize_unused_memory + @ .global __RAM_segment_used_end__ + .global _tx_timer_interrupt + .global __main + .global __isr_vector + .global __tx_SysTickHandler @ SysTick + .extern setupApplicationsIsr +@ +@ +SYSTEM_CLOCK = 80000000 +SYSTICK_CYCLES = ((SYSTEM_CLOCK / ASYNC_CONFIG_TICK_IN_US) -1) + + .text 32 + .align 4 + .syntax unified +@/**************************************************************************/ +@/* */ +@/* FUNCTION RELEASE */ +@/* */ +@/* _tx_initialize_low_level Cortex-M4/GNU */ +@/* 6.1 */ +@/* AUTHOR */ +@/* */ +@/* William E. Lamie, Microsoft Corporation */ +@/* */ +@/* DESCRIPTION */ +@/* */ +@/* This function is responsible for any low-level processor */ +@/* initialization, including setting up interrupt vectors, setting */ +@/* up a periodic timer interrupt source, saving the system stack */ +@/* pointer for use in ISR processing later, and finding the first */ +@/* available RAM memory address for tx_application_define. */ +@/* */ +@/* INPUT */ +@/* */ +@/* None */ +@/* */ +@/* OUTPUT */ +@/* */ +@/* None */ +@/* */ +@/* CALLS */ +@/* */ +@/* None */ +@/* */ +@/* CALLED BY */ +@/* */ +@/* _tx_initialize_kernel_enter ThreadX entry function */ +@/* */ +@/* RELEASE HISTORY */ +@/* */ +@/* DATE NAME DESCRIPTION */ +@/* */ +@/* 05-19-2020 William E. Lamie Initial Version 6.0 */ +@/* 09-30-2020 William E. Lamie Modified Comment(s), fixed */ +@/* GNU assembly comment, */ +@/* cleaned up whitespace, */ +@/* resulting in version 6.1 */ +@/* */ +@/**************************************************************************/ +@VOID _tx_initialize_low_level(VOID) +@{ + .global _tx_initialize_low_level + .thumb_func +_tx_initialize_low_level: +@ +@ /* Disable interrupts during ThreadX initialization. */ +@ + CPSID i +@ +@ /* Set base of available memory to end of non-initialised RAM area. */ +@ + @ LDR r0, =_tx_initialize_unused_memory @ Build address of unused memory pointer + @ LDR r1, =__RAM_segment_used_end__ @ Build first free address + @ ADD r1, r1, #4 @ + @ STR r1, [r0] @ Setup first unused memory pointer +@ +@ /* Setup Vector Table Offset Register. */ +@ + MOV r0, #0xE000E000 @ Build address of NVIC registers + LDR r1, =__isr_vector @ Pickup address of vector table + STR r1, [r0, #0xD08] @ Set vector table address +@ +@ /* Set system stack pointer from vector value. */ +@ + LDR r0, =_tx_thread_system_stack_ptr @ Build address of system stack pointer + LDR r1, =__isr_vector @ Pickup address of vector table + LDR r1, [r1] @ Pickup reset stack pointer + STR r1, [r0] @ Save system stack pointer +@ +@ /* Enable the cycle count register. */ +@ + LDR r0, =0xE0001000 @ Build address of DWT register + LDR r1, [r0] @ Pickup the current value + ORR r1, r1, #1 @ Set the CYCCNTENA bit + STR r1, [r0] @ Enable the cycle count register +@ +@ /* Configure SysTick for selected clock rate, or 16384 cycles if no reference. */ +@ + MOV r0, #0xE000E000 @ Build address of NVIC registers + LDR r1, =SYSTICK_CYCLES + STR r1, [r0, #0x14] @ Setup SysTick Reload Value + MOV r1, #0x7 @ Build SysTick Control Enable Value + STR r1, [r0, #0x10] @ Setup SysTick Control +@ +@ /* Configure handler priorities. */ +@ + LDR r1, =0x00000000 @ Rsrv, UsgF, BusF, MemM + STR r1, [r0, #0xD18] @ Setup System Handlers 4-7 Priority Registers + + LDR r1, =0xFF000000 @ SVCl, Rsrv, Rsrv, Rsrv + STR r1, [r0, #0xD1C] @ Setup System Handlers 8-11 Priority Registers + @ Note: SVC must be lowest priority, which is 0xFF + + LDR r1, =0x40FF0000 @ SysT, PnSV, Rsrv, DbgM + STR r1, [r0, #0xD20] @ Setup System Handlers 12-15 Priority Registers + @ Note: PnSV must be lowest priority, which is 0xFF +@ +@ /* Configure custom reference app ISRs */ +@ + PUSH {lr} + BL setupApplicationsIsr @ Call the function + POP {lr} +@ +@ /* Return to caller. */ +@ + BX lr +@} +@ + +@ /* System Tick timer interrupt handler */ + .global __tx_SysTickHandler + .global SysTick_Handler + .thumb_func +__tx_SysTickHandler: + .thumb_func +SysTick_Handler: +@ VOID TimerInterruptHandler (VOID) +@ { +@ + PUSH {r0, lr} + BL _tx_timer_interrupt + POP {r0, lr} + BX LR +@ } + + .section .text.SVC_Handler + .global SVC_Handler + .thumb_func +SVC_Handler: + b DefaultISR diff --git a/executables/integrationTest/platforms/s32k148evb/main/src/lifecycle/StaticBsp.cpp b/executables/integrationTest/platforms/s32k148evb/main/src/lifecycle/StaticBsp.cpp new file mode 100644 index 00000000000..5741abb80e1 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/main/src/lifecycle/StaticBsp.cpp @@ -0,0 +1,73 @@ +// Copyright 2025 Accenture. + +#include "lifecycle/StaticBsp.h" + +#include "bsp/SystemTime.h" +#include "bsp/eeprom/EepromConfiguration.h" +#include "bsp/timer/ftmConfiguration.hpp" +#include "clock/clockConfig.h" +#include "interrupts/SuspendResumeAllInterruptsScopedLock.h" +#include "interrupts/disableEnableAllInterrupts.h" +#include "io/Io.h" +#include "mcu/mcu.h" + +using namespace bios; + +extern "C" +{ +extern void initSystemTimerHelper(bool sleep); +} + +using Io = bios::Io; + +extern StaticBsp staticBsp; + +StaticBsp::StaticBsp() +: fCyclic10Msec(0U) +, _eepromDriver(eeprom::EEPROM_CONFIG) +, _output() +, _digitalInput() +, _ftm4(*FTM4) +, _pwmSupport(_ftm4) +, _adc() +, _requestUpdateGateRegisters(false) +, _mode(_INIT_) +{ + initSystemTimer(); +} + +void StaticBsp::init() { hwInit(); } + +void StaticBsp::hwInit() +{ + initSystemTimerHelper(false); + (void)_eepromDriver.init(); + _output.init(0); + _digitalInput.init(0); + + sysDelayUs(150U); + + _adc.init(); + _adc.start(); + + _ftm4.init(&bios::_cfgFtm4); + + _pwmSupport.init(); + _ftm4.start(); + _pwmSupport.start(); + + _mode = _RUN_; +} + +void StaticBsp::shutdown() {} + +void StaticBsp::cyclic() +{ + _adc.cyclic(); + + fCyclic10Msec++; + if (fCyclic10Msec >= 10) + { + fCyclic10Msec = 0; + } +} diff --git a/executables/integrationTest/platforms/s32k148evb/main/src/main.cpp b/executables/integrationTest/platforms/s32k148evb/main/src/main.cpp new file mode 100644 index 00000000000..94a5b6adf82 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/main/src/main.cpp @@ -0,0 +1,70 @@ +// Copyright 2025 Accenture. + +#include "async/Config.h" +#include "cache/cache.h" +#include "clock/clockConfig.h" +#include "interrupt_manager.h" +#include "lifecycle/StaticBsp.h" +#include "systems/BspSystem.h" + +#include +#include +#include + +#include +#include + +extern void app_main(); + +extern "C" +{ +void ExceptionHandler() +{ + while (true) + { + printf("ExceptionHandler :("); + } +} + +void boardInit() +{ + ::safety::bsp::Watchdog::disableWatchdog(); + configurPll(); + cacheEnable(); +} + +void setupApplicationsIsr(void) +{ + // interrupts + ENABLE_INTERRUPTS(); +} +} // extern "C" + +namespace platform +{ +StaticBsp staticBsp; + +StaticBsp& getStaticBsp() { return staticBsp; } + +::etl::typed_storage<::systems::BspSystem> bspSystem; + +/** + * Callout from main application to give platform the chance to add a + * ::lifecycle::ILifecycleComponent to the \p lifecycleManager at a given \p level. + */ +void platformLifecycleAdd(::lifecycle::LifecycleManager& lifecycleManager, uint8_t const level) +{ + if (level == 1U) + { + lifecycleManager.addComponent("bsp", bspSystem.create(TASK_BSP, staticBsp), level); + } +} +} // namespace platform + +int main() +{ + ::platform::staticBsp.init(); + printf("main(RCM::SRS 0x%" PRIx32 ")\r\n", *reinterpret_cast(0x4007F008)); + app_main(); // entry point for the generic part + return (1); // we never reach this point +} diff --git a/executables/integrationTest/platforms/s32k148evb/main/src/os/isr/isr_sys.cpp b/executables/integrationTest/platforms/s32k148evb/main/src/os/isr/isr_sys.cpp new file mode 100644 index 00000000000..ac436d6fa0e --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/main/src/os/isr/isr_sys.cpp @@ -0,0 +1,43 @@ +// Copyright 2025 Accenture. + +#include "reset/softwareSystemReset.h" + +#include + +extern "C" +{ +void HardFault_Handler() +{ + // WARNING: + // Do NOT modify this function if possible. Use HardFault_Handler_Final instead. + // Refer to hardFaultHandler documentation for details. + printf("HardFault_Handler\r\n"); +#ifndef UNIT_TEST + asm volatile("b customHardFaultHandler"); +#else + while (true) {} +#endif +} + +void HardFault_Handler_Final() +{ + printf("HardFault_Handler_Final\r\n"); + softwareSystemReset(); + while (true) {} +} + +void BusFault_Handler() +{ + printf("BusFault_Handler\r\n"); + softwareSystemReset(); + while (true) {} +} + +void UsageFault_Handler() +{ + printf("UsageFault_Handler\r\n"); + softwareSystemReset(); + while (true) {} +} + +} // extern "C" diff --git a/executables/integrationTest/platforms/s32k148evb/main/src/osHooks/freertos/osHooks.cpp b/executables/integrationTest/platforms/s32k148evb/main/src/osHooks/freertos/osHooks.cpp new file mode 100644 index 00000000000..560eb029ba6 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/main/src/osHooks/freertos/osHooks.cpp @@ -0,0 +1,21 @@ +// Copyright 2024 Accenture. + +#include "FreeRTOS.h" +#include "task.h" + +#include + +extern "C" +{ +void vApplicationStackOverflowHook(TaskHandle_t /* xTask */, char* /* pcTaskName */) +{ + printf("vApplicationStackOverflowHook\r\n"); +} + +void vIllegalISR() +{ + printf("vIllegalISR\r\n"); + for (;;) + ; +} +} diff --git a/executables/integrationTest/platforms/s32k148evb/main/src/osHooks/threadx/osHooks.cpp b/executables/integrationTest/platforms/s32k148evb/main/src/osHooks/threadx/osHooks.cpp new file mode 100644 index 00000000000..c17390e1f42 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/main/src/osHooks/threadx/osHooks.cpp @@ -0,0 +1,51 @@ +// Copyright 2024 Accenture. + +#include "osHooks.h" + +#include "async/Config.h" +#include "async/Hook.h" +#include "tx_api.h" + +#include + +extern "C" +{ +extern TX_THREAD _tx_timer_thread; + +void _tx_execution_thread_enter() +{ + TX_THREAD* thread = tx_thread_identify(); + if (thread->tx_thread_priority == _tx_timer_thread.tx_thread_priority) + { + asyncEnterTask(static_cast(ASYNC_CONFIG_TASK_COUNT)); + } + else + { + asyncEnterTask(static_cast(thread->tx_thread_entry_parameter)); + } +} + +void _tx_execution_thread_exit() +{ + TX_THREAD* thread = tx_thread_identify(); + if (thread->tx_thread_priority == _tx_timer_thread.tx_thread_priority) + { + asyncLeaveTask(static_cast(ASYNC_CONFIG_TASK_COUNT)); + } + else + { + asyncLeaveTask(static_cast(thread->tx_thread_entry_parameter)); + } +} + +void tx_low_power_enter() {} + +void tx_low_power_exit() {} + +void vIllegalISR() +{ + printf("vIllegalISR\r\n"); + for (;;) + ; +} +} diff --git a/executables/integrationTest/platforms/s32k148evb/main/src/systems/BspSystem.cpp b/executables/integrationTest/platforms/s32k148evb/main/src/systems/BspSystem.cpp new file mode 100644 index 00000000000..20f3c9521fb --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/main/src/systems/BspSystem.cpp @@ -0,0 +1,49 @@ +// Copyright 2025 Accenture. + +#include "systems/BspSystem.h" + +#include "bsp/timer/SystemTimer.h" +#include "outputPwm/OutputPwm.h" + +namespace systems +{ + +BspSystem::BspSystem(::async::ContextType const context, StaticBsp& staticBsp) +: ::lifecycle::SingleContextLifecycleComponent(context) +, _context(context) +, _staticBsp(staticBsp) +, _analogTester() +, _outputPwmTester() +, _digitalInputTester() +, _outputTester() +, _asyncCommandWrapper_for_analogTester(_analogTester, context) +, _asyncOutputPwmTester(_outputPwmTester, context) +, _asyncDigitalInputTester(_digitalInputTester, context) +, _asyncOutputTester(_outputTester, context) +{} + +void BspSystem::init() { transitionDone(); } + +void BspSystem::run() +{ + ::async::scheduleAtFixedRate(_context, *this, _timeout, 10u, ::async::TimeUnit::MILLISECONDS); + transitionDone(); +} + +void BspSystem::shutdown() +{ + _timeout.cancel(); + transitionDone(); +} + +void BspSystem::execute() +{ + cyclic(); + _staticBsp.cyclic(); +} + +uint8_t bspSystemCycleCount = 0; + +void BspSystem::cyclic() {} + +} // namespace systems diff --git a/executables/integrationTest/platforms/s32k148evb/threadXCoreConfiguration/CMakeLists.txt b/executables/integrationTest/platforms/s32k148evb/threadXCoreConfiguration/CMakeLists.txt new file mode 100644 index 00000000000..f0d6bbc1f68 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/threadXCoreConfiguration/CMakeLists.txt @@ -0,0 +1,3 @@ +add_library(threadXCoreConfiguration INTERFACE) + +target_include_directories(threadXCoreConfiguration INTERFACE include) diff --git a/executables/integrationTest/platforms/s32k148evb/threadXCoreConfiguration/include/tx_user.h b/executables/integrationTest/platforms/s32k148evb/threadXCoreConfiguration/include/tx_user.h new file mode 100644 index 00000000000..fe08a201d15 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/threadXCoreConfiguration/include/tx_user.h @@ -0,0 +1,44 @@ +// Copyright 2025 Accenture. + +#pragma once + +/* Override various options with default values already assigned in tx_port.h. Please also refer + to tx_port.h for descriptions on each of these options. */ + +#include "async/Config.h" + +#define ROUND_UP_32(x) (((x) + 31U) & ~31U) +#define TX_MAX_PRIORITIES_LIMIT 1024 +#define TX_MIN_PRIORITIES 32 + +/* Define the priority levels for ThreadX. Legal values range + from 32 to 1024 and MUST be evenly divisible by 32. */ +#ifndef TX_MAX_PRIORITIES +#define TX_MAX_PRIORITIES \ + ((ROUND_UP_32(ASYNC_CONFIG_TASK_COUNT + 1U)) > TX_MAX_PRIORITIES_LIMIT \ + ? TX_MAX_PRIORITIES_LIMIT \ + : ((ROUND_UP_32(ASYNC_CONFIG_TASK_COUNT + 1U)) < TX_MIN_PRIORITIES \ + ? TX_MIN_PRIORITIES \ + : ROUND_UP_32(ASYNC_CONFIG_TASK_COUNT + 1U))) +#endif // TX_MAX_PRIORITIES + +#if (TX_MAX_PRIORITIES < 32) || (TX_MAX_PRIORITIES > 1024) || ((TX_MAX_PRIORITIES % 32) != 0) +#error "TX_MAX_PRIORITIES must be between 32 and 1024 and evenly divisible by 32" +#endif + +/* Define the minimum stack for a ThreadX thread on this processor. If the size supplied during + thread creation is less than this value, the thread create call will return an error. */ +#ifndef TX_MINIMUM_STACK +#define TX_MINIMUM_STACK (1024U) +#endif + +#define TX_ENABLE_STACK_CHECKING + +#define TX_NO_FILEX_POINTER + +#define TX_TIMER_TICKS_PER_SECOND \ + (1000000U / ASYNC_CONFIG_TICK_IN_US) // System tick interval in seconds. + +#define TX_ENABLE_STACK_CHECKING + +#define TX_ENABLE_EXECUTION_CHANGE_NOTIFY diff --git a/executables/integrationTest/platforms/s32k148evb/threadXCoreConfiguration/module.spec b/executables/integrationTest/platforms/s32k148evb/threadXCoreConfiguration/module.spec new file mode 100644 index 00000000000..f75191894b2 --- /dev/null +++ b/executables/integrationTest/platforms/s32k148evb/threadXCoreConfiguration/module.spec @@ -0,0 +1 @@ +oss: true \ No newline at end of file diff --git a/test/pyTest/.pytest.ini b/test/pyTest/.pytest.ini index 70687e04ab6..721c089c576 100644 --- a/test/pyTest/.pytest.ini +++ b/test/pyTest/.pytest.ini @@ -1,3 +1,3 @@ [pytest] norecursedirs = unittests -markers = skip_if(condition): Skip test if condition matches target/app combination \ No newline at end of file +markers = skip_if(condition): Skip test if condition matches target/app combination diff --git a/test/pyTest/README.md b/test/pyTest/README.md index 549e034de72..ac0f26f34e5 100644 --- a/test/pyTest/README.md +++ b/test/pyTest/README.md @@ -48,12 +48,14 @@ Custom options: Default="posix". --no-restart Skip restart of target(s) before each test --app To choose the freertos based or threadx based elf file. - Usage example is --app=threadx - Default="freertos" + Usage examples are --app=refApp_threadx or --app=intTestApp_freertos or --app=intTestApp_threadx. + Default="refApp_freertos" ``` The `--target` option allows you to choose the target to run tests with. Each target's TOML file defines its details (see format description below). +The tests are grouped based on `--app`. The folder`/testconfig` has currently two toml files, each of which contain the list of tests applicable for each application (currently supported applications are refApp and intTestApp). + By default, each target is started before running each test and stopped at the end of each test, but you can override that using the `--no-restart` option so that it will launch the target once at the start of the `pytest` run and stop it at the end. @@ -122,6 +124,9 @@ which has been configured for serial communication in `target_s32k148_with_hwtes under `[hw_tester_serial]`. Tests with the fixture `hw_tester` will be only be run if `[hw_tester_serial]` is present. +### Running `pytest` with `--target=s32k148 --app=intTest_freertos or threadx` +For this option, RC filter needs to be connected in between PWM output pin and ADC input + ### Fixtures in tests All tests have the fixture `target_session`. diff --git a/test/pyTest/conftest.py b/test/pyTest/conftest.py index d0afa5c5bab..ea6b4c9fb35 100644 --- a/test/pyTest/conftest.py +++ b/test/pyTest/conftest.py @@ -18,6 +18,7 @@ capture_serial_by_name, CaptureSerial, ) +from pathlib import Path from serial_minilog import start_minilog, stop_minilog, on_line as minilog_on_line import functools from datetime import datetime @@ -181,8 +182,8 @@ def pytest_addoption(parser): parser.addoption( "--app", action="store", - default="freertos", - help="Select which software (app) configuration to flash, e.g., threadx or freertos based application", + default="refApp_freertos", + help="Select which software (app) configuration to flash, e.g., intTestApp_freertos or refApp_threadx based application", ) @@ -264,3 +265,23 @@ def pytest_runtest_setup(item): context = {"target": target, "app": app} if eval(condition, {}, context): pytest.skip(f"Skipped because condition '{condition}' matched") + + +def pytest_collection_modifyitems(config, items): + for name, target in TargetInfo.by_name.items(): + enabled_tests, reason = TargetInfo.load_enabled_tests(target, config.option.app) + if enabled_tests is None: + for item in items: + if reason is not None: + pytest.skip(reason) + else: + pytest.skip( + f"No test_list configuration is assigned to the target under the application '{config.option.app}'" + ) + for item in items: + if item.path not in enabled_tests: + item.add_marker( + pytest.mark.skip( + reason="Test not enabled under enabled_tests in test config" + ) + ) diff --git a/test/pyTest/console/test_pwm.py b/test/pyTest/console/test_pwm.py new file mode 100644 index 00000000000..2996a0f234f --- /dev/null +++ b/test/pyTest/console/test_pwm.py @@ -0,0 +1,56 @@ +# Integration test: set PWM duty via console and validate output using RC filter + ADC +# PWM Channel: FTM4_CH4(PTE24) : J5-7 +# ADC Channel: ADC0(PTC29) : J4-10 +# RC filter: R=10k, C=0.1uF + +import pytest +import time + + +@pytest.mark.skip_if("target!=['s32k148']") +@pytest.mark.parametrize("duty_cycle", [0, 2500, 5000, 7500, 10000]) +def test_pwm_rc_filter(target_session, duty_cycle): + if target_session.target_name == "posix": + pytest.skip("Hardware specific test") + + capserial = target_session.capserial() + assert capserial.wait_for_boot_complete() + + write_command = f"pwm set 3 {duty_cycle}\n" + write_expected = [ + b"ok", + f'Received console command "pwm set 3 {duty_cycle}"'.encode(), + b"Console command succeeded", + ] + capserial.clear() + capserial.send_command(write_command.encode()) + success, output, _ = capserial.read_until( + write_expected, timeout=2, match_all_expected=True + ) + assert success, f"pwm set failed for {duty_cycle}" + + # give RC filter + output driver time to settle + time.sleep(0.05) + + # Convert duty (0..10000) to expected voltage in mV + VDD = 5 + expected_voltage_mv = int(VDD * (duty_cycle / 10000.0) * 1000.0) + tolerance_mv = 100 + expected = [b"Adc Channel 1 : AiEval_ADC", b"ok"] + capserial.clear() + capserial.write(b"adc get 1\n") + (success, lines, _) = capserial.read_until(expected, timeout=3) + assert success, "Failed to read ADC channel 1" + + # Validate ADC measurement + valid_measurement = False + for val in lines: + if "scaled" in val.decode(): + measured_mv = int(val.decode().split()[-3]) + if abs(measured_mv - expected_voltage_mv) <= tolerance_mv: + valid_measurement = True + else: + raise AssertionError( + f"ADC value {measured_mv} mV is out of range (±{tolerance_mv} mV of {expected_voltage_mv} mV)" + ) + assert valid_measurement, "No valid ADC measurement found within expected range" diff --git a/test/pyTest/console/test_stats_cpu.py b/test/pyTest/console/test_stats_cpu.py index 52974d10447..35838efc758 100644 --- a/test/pyTest/console/test_stats_cpu.py +++ b/test/pyTest/console/test_stats_cpu.py @@ -2,7 +2,7 @@ from time import sleep -@pytest.mark.skip_if("target==['posix'] and app=='threadx'") +@pytest.mark.skip_if("target==['posix'] and 'threadx' in app") def test_console_stats_cpu(target_session): capserial = target_session.capserial() assert capserial.wait_for_boot_complete() @@ -20,7 +20,7 @@ def test_console_stats_cpu(target_session): assert success -@pytest.mark.skip_if("target==['posix'] and app=='threadx'") +@pytest.mark.skip_if("target==['posix'] and 'threadx' in app") def test_console_cpu_health(target_session): capserial = target_session.capserial() diff --git a/test/pyTest/target_info.py b/test/pyTest/target_info.py index ae338887ad1..d134235ba58 100644 --- a/test/pyTest/target_info.py +++ b/test/pyTest/target_info.py @@ -34,19 +34,28 @@ class TargetInfo: 'Default="posix".' ) - def __init__(self, name, fp, cmd_line_no_restart, app="freertos"): + def __init__(self, name, fp, cmd_line_no_restart, app="refApp_freertos"): self._name = name target_info = tomli.load(fp) app_info = target_info.get(app, {}) if not app_info: raise ValueError(f"No configuration found for app '{app}'") + self._socketcan = target_info.get("socketcan", {}) self._serial = target_info.get("serial", {}) self._eth = target_info.get("eth", {}) self._pty_forwarder = target_info.get("pty_forwarder", {}) self._per_run_process = app_info.get("per_run_process", {}) self._target_process = app_info.get("target_process", {}) - self._boot = target_info.get("boot", {}) + self._test_set_path = self._per_run_process.get( + "test_set" + ) or self._target_process.get("test_set") + app_prefix = app.split("_")[0] # Values will be either refApp or intTestApp + if f"{app_prefix}" in target_info: + self._boot = target_info.get(app_prefix, {}).get("boot", {}) + else: + self._boot = target_info.get("boot", {}) + self._hw_tester_serial = target_info.get("hw_tester_serial", {}) self._set_defaults(cmd_line_no_restart) @@ -136,10 +145,34 @@ def __str__(self): desc = desc + f"target_process={self.target_process}\n" desc = desc + f"boot={self.boot}\n" desc = desc + f"hw_tester_serial={self.hw_tester_serial}\n" + desc = desc + f"test_set_path={self._test_set_path}\n" return desc @staticmethod - def load(targets, cmd_line_no_restart, app="freertos"): + def load_enabled_tests(self, app="refApp_freertos"): + if self._test_set_path is None: + return None, None + with open(self._test_set_path, "rb") as f: + cfg = tomli.load(f) + test_cfg = cfg.get("test_set") + if test_cfg.get("name") not in app: + # print("Mismatch in application file name in test config") + return None, "Mismatch in application file name in test config" + patterns = test_cfg.get("enabled_tests", []) + if not patterns: + return None, None + if not test_cfg: + raise ValueError("Missing [test_set] section") + repo_root = Path.cwd().resolve() + all_paths = set() + for pattern in patterns: + for p in repo_root.glob(pattern): + if p.is_file(): + all_paths.add(p.resolve()) + return all_paths, None + + @staticmethod + def load(targets, cmd_line_no_restart, app="refApp_freertos"): if not targets: targets = ["posix"] elif isinstance(targets, str): @@ -179,12 +212,23 @@ def load(targets, cmd_line_no_restart, app="freertos"): parser.add_argument( "--app", action="store", - default="freertos", + default="refApp_freertos", help="Select which software (app) configuration to flash, e.g., threadx or freertos based application", ) - args = parser.parse_args() + TargetInfo.load(args.target, args.no_restart, args.app) - for name in TargetInfo.by_name: - print(f'target "{name}" read from target_{name}.toml') + + for name, target in TargetInfo.by_name.items(): + print('target "' + name + '" read from target_' + name + ".toml") print(TargetInfo.by_name[name]) + try: + enabled_tests = TargetInfo.load_enabled_tests(target) + except Exception as e: + print(f"ERROR loading test_set: {e}") + continue + + if not enabled_tests: + print("Enabled tests: ") + else: + print(f"Enabled tests:{enabled_tests}") diff --git a/test/pyTest/target_posix.toml b/test/pyTest/target_posix.toml index 8dfd9117f9f..7efe2fdab29 100644 --- a/test/pyTest/target_posix.toml +++ b/test/pyTest/target_posix.toml @@ -14,19 +14,30 @@ ip_address = "192.168.0.201" [pty_forwarder] ext_link = "/tmp/pty_forwarder" -[freertos.target_process] +[refApp_freertos.target_process] command_line = "../../build/posix-freertos/executables/referenceApp/application/Release/app.referenceApp.elf < /tmp/pty_forwarder > /tmp/pty_forwarder" +test_set = "testconfig/refApp_tests.toml" restart_if_exited = true kill_at_end = true -[boot] +[refApp_threadx.target_process] +command_line = "../../build/posix-threadx/executables/referenceApp/application/Release/app.referenceApp.elf < /tmp/pty_forwarder > /tmp/pty_forwarder" +test_set = "testconfig/refApp_tests.toml" +restart_if_exited = true +kill_at_end = true + +[refApp.boot] started_str = "INFO: Run level 1" complete_str = "DEBUG: Run level 9 done" max_time = 0.5 -[threadx.target_process] -command_line = "../../build/posix-threadx/executables/referenceApp/application/Release/app.referenceApp.elf < /tmp/pty_forwarder > /tmp/pty_forwarder" +[intTestApp_freertos.target_process] +command_line = "../../build/integrationtest-posix-freertos/executables/integrationTest/application/Release/app.integrationTest.elf < /tmp/pty_forwarder > /tmp/pty_forwarder" +test_set = "testconfig/intTestApp_tests.toml" restart_if_exited = true kill_at_end = true - +[intTestApp.boot] +started_str = "INFO: Run level 1" +complete_str = "DEBUG: Run level 5 done" +max_time = 0.5 diff --git a/test/pyTest/target_s32k148.toml b/test/pyTest/target_s32k148.toml index c47bea8a74f..a8d12ee8b26 100644 --- a/test/pyTest/target_s32k148.toml +++ b/test/pyTest/target_s32k148.toml @@ -13,25 +13,52 @@ send_command_max_retries = 2 [eth] ip_address = "192.168.0.200" -[freertos.per_run_process] +[refApp_freertos.per_run_process] command_line = "arm-none-eabi-gdb -batch -x flash.gdb ../../build/s32k148-freertos-gcc/executables/referenceApp/application/RelWithDebInfo/app.referenceApp.elf > /dev/null 2>&1" +test_set = "testconfig/refApp_tests.toml" wait_for_exit = true -[freertos.target_process] +[refApp_freertos.target_process] command_line = "arm-none-eabi-gdb -batch -x reset.gdb ../../build/s32k148-freertos-gcc/executables/referenceApp/application/RelWithDebInfo/app.referenceApp.elf > /dev/null 2>&1" wait_for_exit = true + +[refApp_threadx.per_run_process] +command_line = "arm-none-eabi-gdb -batch -x flash.gdb ../../build/s32k148-threadx-gcc/executables/referenceApp/application/RelWithDebInfo/app.referenceApp.elf > /dev/null 2>&1" +test_set = "testconfig/refApp_tests.toml" +wait_for_exit = true +skip_first = true + +[refApp_threadx.target_process] +command_line = "arm-none-eabi-gdb -batch -x reset.gdb ../../build/s32k148-threadx-gcc/executables/referenceApp/application/RelWithDebInfo/app.referenceApp.elf > /dev/null 2>&1" +wait_for_exit = true skip_first = true -[boot] +[refApp.boot] started_str = "INFO: Run level 1" complete_str = "DEBUG: Run level 9 done" max_time = 1.5 -[threadx.per_run_process] -command_line = "arm-none-eabi-gdb -batch -x flash.gdb ../../build/s32k148-threadx-gcc/executables/referenceApp/application/RelWithDebInfo/app.referenceApp.elf > /dev/null 2>&1" +[intTestApp_freertos.per_run_process] +command_line = "arm-none-eabi-gdb -batch -x flash.gdb ../../build/integrationtest-s32k148-freertos-gcc/executables/integrationTest/application/RelWithDebInfo/app.integrationTest.elf > /dev/null 2>&1" +test_set = "testconfig/intTestApp_tests.toml" wait_for_exit = true -[threadx.target_process] -command_line = "arm-none-eabi-gdb -batch -x reset.gdb ../../build/s32k148-threadx-gcc/executables/referenceApp/application/RelWithDebInfo/app.referenceApp.elf > /dev/null 2>&1" +[intTestApp_freertos.target_process] +command_line = "arm-none-eabi-gdb -batch -x reset.gdb ../../build/integrationtest-s32k148-freertos-gcc/executables/integrationTest/application/RelWithDebInfo/app.integrationTest.elf > /dev/null 2>&1" +wait_for_exit = true + +[intTestApp_threadx.per_run_process] +command_line = "arm-none-eabi-gdb -batch -x flash.gdb ../../build/integrationtest-s32k148-threadx-gcc/executables/integrationTest/application/RelWithDebInfo/app.integrationTest.elf > /dev/null 2>&1" +test_set = "testconfig/intTestApp_tests.toml" +wait_for_exit = true +skip_first = true + +[intTestApp_threadx.target_process] +command_line = "arm-none-eabi-gdb -batch -x reset.gdb ../../build/integrationtest-s32k148-threadx-gcc/executables/integrationTest/application/RelWithDebInfo/app.integrationTest.elf > /dev/null 2>&1" wait_for_exit = true skip_first = true + +[intTestApp.boot] +started_str = "INFO: Run level 1" +complete_str = "DEBUG: Run level 5 done" +max_time = 1.0 diff --git a/test/pyTest/target_s32k148_with_hwtester.toml b/test/pyTest/target_s32k148_with_hwtester.toml index de7a452f860..303bf6fd5a5 100644 --- a/test/pyTest/target_s32k148_with_hwtester.toml +++ b/test/pyTest/target_s32k148_with_hwtester.toml @@ -12,6 +12,7 @@ send_command_max_retries = 2 [freertos.per_run_process] command_line = "arm-none-eabi-gdb -batch -x flash.gdb ../../build/s32k148-freertos-gcc/executables/referenceApp/application/RelWithDebInfo/app.referenceApp.elf > /dev/null 2>&1" +test_set = "testconfig/refApp_tests.toml" wait_for_exit = true [freertos.target_process] @@ -26,6 +27,7 @@ max_time = 1.5 [threadx.per_run_process] command_line = "arm-none-eabi-gdb -batch -x flash.gdb ../../build/s32k148-threadx-gcc/executables/referenceApp/application/RelWithDebInfo/app.referenceApp.elf > /dev/null 2>&1" +test_set = "testconfig/refApp_tests.toml" wait_for_exit = true [threadx.target_process] diff --git a/test/pyTest/testconfig/intTestApp_tests.toml b/test/pyTest/testconfig/intTestApp_tests.toml new file mode 100644 index 00000000000..4067e0b20a9 --- /dev/null +++ b/test/pyTest/testconfig/intTestApp_tests.toml @@ -0,0 +1,6 @@ +[test_set] +name = "intTestApp" + +enabled_tests = [ + "console/test_pwm.py" + ] diff --git a/test/pyTest/testconfig/refApp_tests.toml b/test/pyTest/testconfig/refApp_tests.toml new file mode 100644 index 00000000000..df347137e22 --- /dev/null +++ b/test/pyTest/testconfig/refApp_tests.toml @@ -0,0 +1,20 @@ +[test_set] +name = "refApp" + +enabled_tests = [ + "can/test_can.py", + "console/test_adc.py", + "console/test_can_command.py", + "console/test_lc_reboot.py", + "console/test_lifecycle.py", + "console/test_logger.py", + "console/test_restart.py", + "console/test_stats_cpu.py", + "console/test_stats_stack.py", + "console/test_storage.py", + "enet/test_ethernet.py", + "uds/test_DiagSession.py", + "uds/test_RDBI.py", + "uds/test_TesterPresent.py", + "uds/test_udsToolRDBI.py" +]