Merge keyswitch development into main

* Added contents to prepare for v1.1 release
  Added keyswitch kernel support
  Added integrated kernel support for DyadicMultiply and Keyswitch
  Deprecated standalone NTT/INTT
  Updated documentation

Author: ymeng-git

.clang-format

@@ -8,3 +8,4 @@ PointerAlignment: Left
 IndentWidth: 4
 AccessModifierOffset: -4
 IndentCaseLabels: false
+SortIncludes: false

.github/workflows/ci.yml

@@ -64,14 +64,24 @@ jobs:
           source /disk1/tools/init_env.sh
           source /disk1/tools/new_env_setup.sh
           cd build
+          export FPGA_DATA_DIR="/disk1/hexl-fpga-data"
+          export KEYSWITCH_DATA_DIR="${FPGA_DATA_DIR}/test-vectors"
+          echo "Run tests with bitstream"
+          export FPGA_BITSTREAM_DIR="${FPGA_DATA_DIR}/bitstreams"
+          make tests
+          echo "Run tests with emulation"
+          export FPGA_BITSTREAM_DIR=
           RUN_CHOICE=1 make tests
 
       - name: run_bench
         run: |
           source /disk1/tools/init_env.sh
           source /disk1/tools/new_env_setup.sh
           cd build
-          RUN_CHOICE=1 make bench
+          export FPGA_DATA_DIR="/disk1/hexl-fpga-data"
+          export FPGA_BITSTREAM_DIR="${FPGA_DATA_DIR}/bitstreams"
+          export KEYSWITCH_DATA_DIR="${FPGA_DATA_DIR}/test-vectors"
+          make bench
 
       - name: build_examples
         run: |

CHANGES.md

@@ -1,5 +1,15 @@
 # Changes
 
+## Version 1.1
+- Added KeySwitch FPGA kernel support.
+- Added integrated kernel support for DyadicMultiply and KeySwitch.
+- Deprecated standalone NTT and INTT support, which will be removed in the next release.
+- Documentation updates.
+
+Co-Authored-by: @[ymeng-git](https://github.com/ymeng-git) <br/>
+Co-Authored-by: @[yzhou79](https://github.com/yzhou79) <br/>
+Co-Authored-by: @[tgonzalez89-intel](https://github.com/tgonzalez89-intel) <br/>
+
 ## Version 1.0
 - Initial release.
 - Added NTT/INTT/DyadicMultiply FPGA kernel support.

CMakeLists.txt

@@ -4,7 +4,7 @@
 cmake_minimum_required(VERSION 3.5.1)
 
 project(hexl-fpga LANGUAGES C CXX)
-set(hexl-fpga_VERSION 1.0)
+set(hexl-fpga_VERSION 1.1)
 
 set(CMAKE_CONFIGURATION_TYPES Debug Release CACHE STRING INTERNAL FORCE)
 set(CMAKE_BUILD_TYPE "Release" CACHE STRING "Build Type: Debug or Release")

CPPLINT.cfg

@@ -1,12 +1,13 @@
 # Copyright (C) 2020-2021 Intel Corporation
 # SPDX-License-Identifier: Apache-2.0
 
-filter=-readability/casting
-filter=-whitespace/indent
 filter=-build/header_guard
-filter=-runtime/references
-filter=-runtime/int
-filter=-readability/braces
+filter=-build/include_order
 filter=-build/include_subdir
 filter=-build/c++11
 filter=-build/include_what_you_use
+filter=-runtime/references
+filter=-runtime/int
+filter=-readability/braces
+filter=-readability/casting
+filter=-whitespace/indent

PREREQUISITE.md

@@ -4,13 +4,13 @@
 
 There are two types of Intel Acceleration Stack (version 2.0.1), namely, the [Acceleration Stack for Runtime](https://www.intel.com/content/www/us/en/programmable/f/download/accelerator/license-agreement-pac-d5005.html?swcode=WWW-SWD-IAS-RTE-201) and the [Acceleration Stack for Development](https://www.intel.com/content/altera-www/global/en_us/index/f/download/accelerator/pac-d5005-thank-you.html?swcode=WWW-SWD-IAS-DEV-201). The runtime stack provides a smaller footprint package for software development of runtime host application.  It includes Intel FPGA Runtime Environment (RTE) for OpenCL but does not include Intel Quartus Prime; thus, it assumes that the FPGA bitstreams are available. The development stack allows for accelerator function development using the Intel Quartus Prime Pro Edition software (required and included). Additionally, it comes with the Intel FPGA Software Development Kit (SDK) for OpenCL and the Acceleration Stack. <br>
 
-The Intel Acceleration Stack for development (`d5005_pac_ias_2_0_1_pv_dev_installer.tar.gz`) is encouraged and required to reap the full benefits of Intel HEXL for FPGA, especially before attempting to build the FPGA kernels and if intended usage of Intel HEXL for FPGA includes development contributions. Download, read more detailed installation instructions, updates and related additional resources at [Intel Acceleration Stack link](https://www.intel.com/content/www/us/en/programmable/products/boards_and_kits/dev-kits/altera/intel-fpga-pac-d5005/getting-started.html). <br>
+The Intel Acceleration Stack for development (`d5005_pac_ias_2_0_1_pv_dev_installer.tar.gz`) is encouraged and required to reap the full benefits of Intel HE Acceleration Library for FPGAs, especially before attempting to build the FPGA kernels and if intended usage of Intel HE Acceleration Library for FPGAs includes development contributions. Download, read more detailed installation instructions, updates and related additional resources at [Intel Acceleration Stack link](https://www.intel.com/content/www/us/en/programmable/products/boards_and_kits/dev-kits/altera/intel-fpga-pac-d5005/getting-started.html). <br>
 
 Note: Even though the validated operating system is RHEL 7.6, we used CentOS 7.9 without issues.<br>
 
 ## Intel Quartus Prime Pro Edition
 
-Quartus Prime version 19.2 is installed in the Acceleration Stack installation. For Intel HEXL for FPGA, the installation of Quartus Prime version 20.3 is required. [Download the complete version ](https://fpgasoftware.intel.com/20.3/?edition=pro) and follow the instructions below. <br>
+Quartus Prime version 19.2 is installed in the Acceleration Stack installation. For Intel HE Acceleration Library for FPGAs, the installation of Quartus Prime version 20.3 is required. [Download the complete version ](https://fpgasoftware.intel.com/20.3/?edition=pro) and follow the instructions below. <br>
 
 ```
 tar xvf Quartus-pro-20.3.0.158-linux-complete.tar