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Commit 27a4695

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ymeng-gitymeng-git
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Feature/runtime device selection (#20)
* enable runtime selection between cpu and fpga
1 parent 4f2e5f1 commit 27a4695

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7 files changed

+119
-87
lines changed

7 files changed

+119
-87
lines changed

‎benchmark/CMakeLists.txt‎

Lines changed: 0 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -20,23 +20,6 @@ function(bench_function kernel)
2020
target_link_libraries(bench_${KERNEL} PRIVATE benchmark::benchmark)
2121
target_link_libraries(bench_${KERNEL} PRIVATE nlohmann_json::nlohmann_json)
2222

23-
if(FPGA_USE_INTEL_HEXL)
24-
target_compile_options(bench_${KERNEL} PRIVATE -DFPGA_USE_INTEL_HEXL)
25-
if(FPGA_BUILD_INTEL_HEXL)
26-
add_dependencies(bench_${KERNEL} ext_intel_hexl)
27-
target_include_directories(bench_${KERNEL} PRIVATE ${CMAKE_BINARY_DIR}/hexl-install/${CMAKE_INSTALL_INCLUDEDIR})
28-
target_link_directories(bench_${KERNEL} PRIVATE ${CMAKE_BINARY_DIR}/hexl-install/${CMAKE_INSTALL_LIBDIR})
29-
target_link_libraries(bench_${KERNEL} PRIVATE ${CMAKE_BINARY_DIR}/hexl-install/${CMAKE_INSTALL_LIBDIR}/libhexl.so)
30-
else()
31-
get_target_property(
32-
HEXL_INCLUDE_DIR
33-
HEXL::hexl
34-
INTERFACE_INCLUDE_DIRECTORIES)
35-
target_include_directories(bench_${KERNEL} PRIVATE ${HEXL_INCLUDE_DIR})
36-
target_link_libraries(bench_${KERNEL} PRIVATE HEXL::hexl)
37-
endif()
38-
endif(FPGA_USE_INTEL_HEXL)
39-
4023
add_custom_command(
4124
TARGET bench_${KERNEL} POST_BUILD
4225
COMMAND rm -f lib${KERNEL}.so

‎benchmark/bench_keyswitch.cpp‎

Lines changed: 10 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -10,11 +10,7 @@
1010

1111
#include <benchmark/benchmark.h>
1212

13-
#ifdef FPGA_USE_INTEL_HEXL
14-
#include "hexl/hexl.hpp"
15-
#else
1613
#include "hexl-fpga.h"
17-
#endif
1814

1915
static uint32_t get_iter() {
2016
char* env = getenv("ITER");
@@ -115,35 +111,23 @@ void keyswitch::setup_keyswitch(const std::vector<std::string>& files) {
115111
}
116112

117113
void keyswitch::bench_keyswitch() {
118-
#ifndef FPGA_USE_INTEL_HEXL
119114
intel::hexl::set_worksize_KeySwitch(test_vector_size_ * n_iter);
120-
#endif
121-
122-
#ifndef FPGA_USE_INTEL_HEXL
123-
// HEXL-FPGA version of keyswitch
124-
namespace ns = intel::hexl;
125-
#else
126-
// HEXL CPU version of keyswitch
127-
namespace ns = intel::hexl::internal;
128-
#endif
129115

130116
for (size_t n = 0; n < n_iter; n++) {
131117
for (size_t i = 0; i < test_vector_size_; i++) {
132-
ns::KeySwitch(test_vectors_[i].input.data(),
133-
test_vectors_[i].t_target_iter_ptr.data(),
134-
test_vectors_[0].coeff_count,
135-
test_vectors_[0].decomp_modulus_size,
136-
test_vectors_[0].key_modulus_size,
137-
test_vectors_[0].rns_modulus_size,
138-
test_vectors_[0].key_component_count,
139-
test_vectors_[0].moduli.data(),
140-
test_vectors_[0].key_vectors.data(),
141-
test_vectors_[0].modswitch_factors.data());
118+
intel::hexl::KeySwitch(test_vectors_[i].input.data(),
119+
test_vectors_[i].t_target_iter_ptr.data(),
120+
test_vectors_[0].coeff_count,
121+
test_vectors_[0].decomp_modulus_size,
122+
test_vectors_[0].key_modulus_size,
123+
test_vectors_[0].rns_modulus_size,
124+
test_vectors_[0].key_component_count,
125+
test_vectors_[0].moduli.data(),
126+
test_vectors_[0].key_vectors.data(),
127+
test_vectors_[0].modswitch_factors.data());
142128
}
143129
}
144-
#ifndef FPGA_USE_INTEL_HEXL
145130
intel::hexl::KeySwitchCompleted();
146-
#endif
147131
}
148132

149133
BENCHMARK_F(keyswitch, 16384_6_7_7_2)

‎benchmark/main.cpp‎

Lines changed: 1 addition & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -3,19 +3,14 @@
33

44
#include <benchmark/benchmark.h>
55

6-
#ifndef FPGA_USE_INTEL_HEXL
76
#include "hexl-fpga.h"
8-
#endif
97

108
int main(int argc, char** argv) {
11-
#ifndef FPGA_USE_INTEL_HEXL
129
intel::hexl::acquire_FPGA_resources();
13-
#endif
10+
1411
benchmark::Initialize(&argc, argv);
1512
benchmark::RunSpecifiedBenchmarks();
1613

17-
#ifndef FPGA_USE_INTEL_HEXL
1814
intel::hexl::release_FPGA_resources();
19-
#endif
2015
return 0;
2116
}

‎host/CMakeLists.txt‎

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -56,6 +56,23 @@ if(ENABLE_PROF_KS)
5656
target_compile_options(hexl-fpga PRIVATE -D__DEBUG_KS_RUNTIME)
5757
endif(ENABLE_PROF_KS)
5858

59+
if(FPGA_USE_INTEL_HEXL)
60+
target_compile_options(hexl-fpga PRIVATE -DFPGA_USE_INTEL_HEXL)
61+
if(FPGA_BUILD_INTEL_HEXL)
62+
add_dependencies(hexl-fpga ext_intel_hexl)
63+
target_include_directories(hexl-fpga PRIVATE ${CMAKE_BINARY_DIR}/hexl-install/${CMAKE_INSTALL_INCLUDEDIR})
64+
target_link_directories(hexl-fpga PRIVATE ${CMAKE_BINARY_DIR}/hexl-install/${CMAKE_INSTALL_LIBDIR})
65+
target_link_libraries(hexl-fpga PRIVATE ${CMAKE_BINARY_DIR}/hexl-install/${CMAKE_INSTALL_LIBDIR}/libhexl.so)
66+
else()
67+
get_target_property(
68+
HEXL_INCLUDE_DIR
69+
HEXL::hexl
70+
INTERFACE_INCLUDE_DIRECTORIES)
71+
target_include_directories(hexl-fpga PRIVATE ${HEXL_INCLUDE_DIR})
72+
target_link_libraries(hexl-fpga PRIVATE HEXL::hexl)
73+
endif()
74+
endif(FPGA_USE_INTEL_HEXL)
75+
5976
list(APPEND incPath "${FPGA_SRC_ROOT_DIR}/host/inc")
6077
target_include_directories(hexl-fpga PUBLIC "$<BUILD_INTERFACE:${incPath}>")
6178
target_include_directories(hexl-fpga INTERFACE "${CMAKE_INSTALL_PREFIX}/${CMAKE_INSTALL_INCLUDEDIR}")

‎host/inc/fpga.h‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -580,9 +580,9 @@ struct KeySwitchMemKeys {
580580

581581
/// @brief
582582
/// enum DEV_TYPE
583-
/// Lists the available device mode: emulation mode, FPGA
583+
/// Lists the available device mode: CPU, EMU, FPGA
584584
///
585-
typedef enum { NONE = 0, EMU, FPGA } DEV_TYPE;
585+
typedef enum { NONE = -1, CPU = 0, EMU, FPGA } DEV_TYPE;
586586
/// @brief
587587
/// Class Device
588588
///

‎host/src/fpga_int.cpp‎

Lines changed: 79 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -18,6 +18,10 @@
1818
#include "keyswitch_int.h"
1919
#include "ntt_int.h"
2020

21+
#ifdef FPGA_USE_INTEL_HEXL
22+
#include "hexl/hexl.hpp"
23+
#endif
24+
2125
namespace intel {
2226
namespace hexl {
2327
namespace fpga {
@@ -38,14 +42,24 @@ static DEV_TYPE get_device() {
3842
char* env = getenv("RUN_CHOICE");
3943
if (env) {
4044
int e = atoi(env);
41-
FPGA_ASSERT((e >= 1) && (e <= 2));
45+
FPGA_ASSERT((e >= 0) && (e <= 2));
4246
d = DEV_TYPE(e);
4347
}
44-
if (d == FPGA)
48+
switch (d) {
49+
case CPU:
50+
std::cout << "Running using HEXL CPU ..." << std::endl;
51+
break;
52+
case EMU:
53+
std::cout << "Running using FPGA Emulator ..." << std::endl;
54+
break;
55+
case FPGA:
4556
std::cout << "Running using Physical FPGA device accelerator ..."
4657
<< std::endl;
47-
else
48-
std::cout << "Running using FPGA Emulator..." << std::endl;
58+
break;
59+
default:
60+
FPGA_ASSERT(0);
61+
break;
62+
}
4963
return d;
5064
}
5165

@@ -127,6 +141,9 @@ static Buffer fpga_buffer(g_fpga_bufsize, g_batch_size_dyadic_mult,
127141
g_batch_size_KeySwitch);
128142

129143
void attach_fpga_pooling() {
144+
if (g_choice == CPU) {
145+
return;
146+
}
130147
std::cout << "Running on FPGA: Creating Static FPGA Device Context ... "
131148
<< std::endl;
132149
exit_signal = std::promise<bool>();
@@ -138,6 +155,9 @@ void attach_fpga_pooling() {
138155
}
139156

140157
void detach_fpga_pooling() {
158+
if (g_choice == CPU) {
159+
return;
160+
}
141161
exit_signal.set_value(true);
142162
delete pool;
143163
pool = nullptr;
@@ -171,6 +191,20 @@ static void fpga_DyadicMultiply(uint64_t* results, const uint64_t* operand1,
171191
}
172192
}
173193

194+
static void cpu_DyadicMultiply(uint64_t* results, const uint64_t* operand1,
195+
const uint64_t* operand2, uint64_t n,
196+
const uint64_t* moduli, uint64_t n_moduli) {
197+
FPGA_ASSERT(g_choice == CPU);
198+
199+
#ifdef FPGA_USE_INTEL_HEXL
200+
namespace ns = intel::hexl::internal;
201+
ns::DyadicMultiply(results, operand1, operand2, n, moduli, n_moduli);
202+
#else
203+
std::cerr << "HEXL CPU version not supported" << std::endl;
204+
exit(1);
205+
#endif
206+
}
207+
174208
bool DyadicMultiplyCompleted_int() {
175209
bool all_done = false;
176210
while (!all_done) {
@@ -200,13 +234,16 @@ void DyadicMultiply_int(uint64_t* results, const uint64_t* operand1,
200234
const uint64_t* operand2, uint64_t n,
201235
const uint64_t* moduli, uint64_t n_moduli) {
202236
switch (g_choice) {
237+
case CPU:
238+
cpu_DyadicMultiply(results, operand1, operand2, n, moduli, n_moduli);
239+
break;
203240
case EMU:
204241
case FPGA:
205242
fpga_DyadicMultiply(results, operand1, operand2, n, moduli, n_moduli);
206243
break;
207244
default:
208245
std::cerr << "ERROR: Invalid RUN_CHOICE envvar. Set to a valid "
209-
"value {1, or 2}, where 1:EMU, 2:FPGA."
246+
"value {0, 1, or 2}, where 0:CPU, 1:EMU, 2:FPGA."
210247
<< std::endl;
211248
FPGA_ASSERT(0);
212249
break;
@@ -277,6 +314,10 @@ void INTT_int(uint64_t* coeff_poly, const uint64_t* inv_root_of_unity_powers,
277314
uint64_t coeff_modulus, uint64_t inv_n, uint64_t inv_n_w,
278315
uint64_t n) {
279316
switch (g_choice) {
317+
case CPU:
318+
std::cerr << "HEXL CPU version not supported" << std::endl;
319+
FPGA_ASSERT(0);
320+
break;
280321
case EMU:
281322
case FPGA:
282323
fpga_INTT(coeff_poly, inv_root_of_unity_powers,
@@ -285,7 +326,7 @@ void INTT_int(uint64_t* coeff_poly, const uint64_t* inv_root_of_unity_powers,
285326
break;
286327
default:
287328
std::cerr << "ERROR: Invalid RUN_CHOICE envvar. Set to a valid "
288-
"value {1, or 2}, where 1:EMU, 2:FPGA."
329+
"value {0, 1, or 2}, where 0:CPU, 1:EMU, 2:FPGA."
289330
<< std::endl;
290331
FPGA_ASSERT(0);
291332
break;
@@ -353,14 +394,18 @@ void NTT_int(uint64_t* coeff_poly, const uint64_t* root_of_unity_powers,
353394
const uint64_t* precon_root_of_unity_powers,
354395
uint64_t coeff_modulus, uint64_t n) {
355396
switch (g_choice) {
397+
case CPU:
398+
std::cerr << "HEXL CPU version not supported" << std::endl;
399+
FPGA_ASSERT(0);
400+
break;
356401
case EMU:
357402
case FPGA:
358403
fpga_NTT(coeff_poly, root_of_unity_powers, precon_root_of_unity_powers,
359404
coeff_modulus, n);
360405
break;
361406
default:
362407
std::cerr << "ERROR: Invalid RUN_CHOICE envvar. Set to a valid "
363-
"value {0, 1, or 2}, where 1:EMU, 2:FPGA."
408+
"value {0, 1, or 2}, where 0:CPU, 1:EMU, 2:FPGA."
364409
<< std::endl;
365410
FPGA_ASSERT(0);
366411
break;
@@ -417,6 +462,26 @@ static void fpga_KeySwitch(uint64_t* result, const uint64_t* t_target_iter_ptr,
417462
}
418463
}
419464

465+
static void cpu_KeySwitch(uint64_t* result, const uint64_t* t_target_iter_ptr,
466+
uint64_t n, uint64_t decomp_modulus_size,
467+
uint64_t key_modulus_size, uint64_t rns_modulus_size,
468+
uint64_t key_component_count, const uint64_t* moduli,
469+
const uint64_t** k_switch_keys,
470+
const uint64_t* modswitch_factors,
471+
const uint64_t* twiddle_factors) {
472+
FPGA_ASSERT(g_choice == CPU);
473+
474+
#ifdef FPGA_USE_INTEL_HEXL
475+
namespace ns = intel::hexl::internal;
476+
ns::KeySwitch(result, t_target_iter_ptr, n, decomp_modulus_size,
477+
key_modulus_size, rns_modulus_size, key_component_count,
478+
moduli, k_switch_keys, modswitch_factors, twiddle_factors);
479+
#else
480+
std::cerr << "HEXL CPU version not supported" << std::endl;
481+
exit(1);
482+
#endif
483+
}
484+
420485
bool KeySwitchCompleted_int() {
421486
bool all_done = false;
422487
while (!all_done) {
@@ -450,6 +515,12 @@ void KeySwitch_int(uint64_t* result, const uint64_t* t_target_iter_ptr,
450515
const uint64_t* modswitch_factors,
451516
const uint64_t* twiddle_factors) {
452517
switch (g_choice) {
518+
case CPU:
519+
cpu_KeySwitch(result, t_target_iter_ptr, n, decomp_modulus_size,
520+
key_modulus_size, rns_modulus_size, key_component_count,
521+
moduli, k_switch_keys, modswitch_factors,
522+
twiddle_factors);
523+
break;
453524
case EMU:
454525
case FPGA:
455526
fpga_KeySwitch(result, t_target_iter_ptr, n, decomp_modulus_size,
@@ -459,7 +530,7 @@ void KeySwitch_int(uint64_t* result, const uint64_t* t_target_iter_ptr,
459530
break;
460531
default:
461532
std::cerr << "ERROR: Invalid RUN_CHOICE envvar. Set to a valid "
462-
"value {1, or 2}, where 1:EMU, 2:FPGA."
533+
"value {0, 1, or 2}, where 0:CPU, 1:EMU, 2:FPGA."
463534
<< std::endl;
464535
FPGA_ASSERT(0);
465536
break;

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