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Description
Hi
Here is the snippet of test log running from TD guest.
CR4_SET_X86_CR4_PCE skipped is expected, as TD has perfmon enabled
MSR_IA32_PRED_CMD is a Write Only MSR from SDM, why perform Read operation, expecting no exception.
Same with IA32_X2APIC stuff, no write allowed from SDM.
Could you please update test pattern per SDM?
thanks
186: CR4_SET_X86_CR4_PCE: SKIP
Error: MSR compliance test failed,exception 13, but expect_exception 0
196: MSR_IA32_PRED_CMD_read_1.0: FAIL
Error: MSR compliance test failed,exception 13, but expect_exception 0
214: MSR_IA32_ARCH_CAPABILITIES_write_1.0: FAIL
Error: MSR compliance test failed,exception 13, but expect_exception 0
215: MSR_IA32_FLUSH_CMD_read_1.0: FAIL
Error: MSR compliance test failed,exception 0, but expect_exception 20
221: MSR_IA32_MISC_ENABLE_write_1.0: FAIL
Error: MSR compliance test failed,exception 13, but expect_exception 0
352: IA32_X2APIC_PPR_write_1.0: FAIL
Error: MSR compliance test failed,exception 13, but expect_exception 0
356: IA32_X2APIC_ISRX_write_1.0: FAIL
Error: MSR compliance test failed,exception 13, but expect_exception 0
358: IA32_X2APIC_TMRX_write_1.0: FAIL
Error: MSR compliance test failed,exception 13, but expect_exception 0
360: IA32_X2APIC_IRRX_write_1.0: FAIL