44 **/
55#include <fx2regs.h>
66#include <fx2macros.h>
7- #include <serial.h>
87#include <uart/api.h>
8+ #include <assert.h>
99
10-
11-
10+ /*This is set by calling the uartX_set_baud() function.*/
11+ unsigned char load_delay ;
1212BOOL uartX_init (enum uart_baud rate , ...)
1313{
1414 //All delay values assume a 48MHZ clock.
@@ -48,7 +48,7 @@ void uartX_tx(char c)
4848 //At 12Mhz, it should be about 83.33ns
4949 //But it appears to be about 88ns
5050 //These numbers have been verified using an analyzer
51- mov r1 , #0x20 //(2 cycles)
51+ mov r1 , _load_delay //(2 cycles)
5252 0006 $ :
5353 //1 bit is about 8.6us
5454 djnz r1 , 0006 $ //DJNZ on Rn takes (3 cycles)
@@ -62,7 +62,7 @@ void uartX_tx(char c)
6262 //Move the carry into the port
6363 mov _TX_PIN , c //(2 cycles)
6464 //Now we need to add delay for the next
65- mov r1 , #0x1F //(2 cycles)
65+ mov r1 , _load_delay //(2 cycles)
6666 //31*3 , 93 cycles of delay
6767 0004 $ :
6868 djnz r1 , 0004 $ //(3 cycles)
@@ -72,17 +72,46 @@ void uartX_tx(char c)
7272 djnz r0 , 0001 $ //(3 cycles)
7373 setb _TX_PIN //(2 cycles) This is for stop bit
7474 //We need to delay the stop bit, otherwise we may get errors.
75- mov r1 , #0x20 //(2 cycles)
75+ mov r1 , _load_delay //(2 cycles)
7676 0005 $ :
77- djnz r1 , 0005 $ //(3 cycles) for DJNZ , Jump for 32*3 , 96 cycles
77+ djnz r1 , 0005 $ //(3 cycles) for DJNZ , Jump for 32*3 , 96 cycles
7878 nop //(NOP takes 1 cycle) 97 cycles of delay
7979 setb _EA ; //Enable back the interrupts
8080 __endasm ;
8181}
8282
8383BOOL uartX_set_baud (enum uart_baud rate )
8484{
85- return FALSE;
85+ switch (rate )
86+ {
87+ case BAUD_2400 :
88+ load_delay = 0xd0 ;
89+ break ;
90+ case BAUD_4800 :
91+ break ;
92+ case BAUD_9600 :
93+ break ;
94+ case BAUD_19200 :
95+ load_delay = 0xd0 ;
96+ break ;
97+ case BAUD_38400 :
98+ load_delay = 0x68 ;
99+ break ;
100+ case BAUD_57600 :
101+ load_delay = 0x45 ;
102+ break ;
103+ case BAUD_115200 :
104+ load_delay = 0x20 ;
105+ break ;
106+ case BAUD_ANY :
107+ break ;
108+ case BAUD_FASTEST :
109+ break ;
110+ default :
111+ load_delay = 0x20 ;
112+ break ;
113+ }
114+ return TRUE;
86115}
87116
88117enum uart_baud uartX_get_baud ()
@@ -98,17 +127,17 @@ BOOL uartX_tx_willblock()
98127char uartX_rx ()
99128{
100129 //This function should never be called
130+ assert (FALSE);
101131 return 0xFF ;
102132}
103133
104134BOOL uartX_check_rx_blocking ()
105135{
106- //Doesnt really matter what we send here
107- return FALSE;
136+ return TRUE;
108137}
109138
110139BYTE uartX_check_receive_buffer ()
111140{
112- //Read not implemented. Always return a 0.
141+ //Read not implemented.No data is present in the buffer
113142 return 0x00 ;
114143}
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