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This commit allows the user to communicate with I2C slaves devices. It consists of a soft i2c core along with a shift register and an examples directory to show its usage.
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‎examples/download.sh‎

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#!/bin/bash -e
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DEVS=$(lsusb|grep -E '(2a19|16c0|04b4|1d50|fb9a|1443)' |sed 's/:.*//;s/Bus //;s/Device //;s/ /\//')
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if [ -z "$1" ]; then
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echo "$0: usage: $0 <file>"
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exit 1;
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fi
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for dev in $DEVS;do
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echo "Downloading $1 to $dev"
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/sbin/fxload -D /dev/bus/usb/$dev -t fx2lp -I $1
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done
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exit 0

‎examples/i2c_bitbang/Makefile‎

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FX2LIBDIR=../../
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BASENAME = i2c_main
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SOURCES=i2c_main.c
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CODE_SIZE = --code-size 0x3000
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XRAM_LOC = --xram-loc 0x3200
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XRAM_SIZE = --xram-size 0x700
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DSCR_AREA=
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INT2JT=
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include $(FX2LIBDIR)/lib/fx2.mk
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fx2_download:
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../download.sh build/$(BASENAME).ihx

‎examples/i2c_bitbang/i2c_main.c‎

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/**
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* Copyright (C) 2009 Ubixum, Inc.
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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**/
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#include <stdio.h>
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#include <fx2regs.h>
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#include <fx2macros.h>
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#include <delay.h>
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#include <fx2ints.h>
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#include <i2c/i2c_utils.h>
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//DELETE once merged.
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void fast_uart(BYTE a);
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/**************************************************
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I2C declarations
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***************************************************/
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//Buffer to load up the data and insert into
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//the i2c_client queue
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__xdata unsigned char write_addr[I2C_ADDR];
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//This is the data buffer.
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__xdata unsigned char write_data[I2C_DATA];
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//This is the address length
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__xdata unsigned char rx_addr_length;
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//This is the data length which needs to be read from or written to.
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__xdata unsigned char rx_data_length;
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//Implementation specific. Not needed for all examples. Used here
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//to read and write from different address locations.
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__xdata unsigned char wr_addr;
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void main() {
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SETCPUFREQ(CLK_48M);
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EA = 1; // global interrupt enable
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/********************************
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I2C BLOCK BITBANG
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*********************************/
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//Called with number of retries
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i2c_init(3);
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configure_start_timer();
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ENABLE_TIMER1();
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wr_addr = 0x03;
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while (TRUE)
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{
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write_addr[0] = 0xa0;
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write_addr[1] = 0x00;
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write_addr[2] = wr_addr;
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write_data[0] = 0x44;
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//Address, data, address length and data length
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I2CPutTX(&write_addr[0],&write_data[0],0x03,0x01);
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//i2c_control();
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write_addr[0] = 0xa1;
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write_data[0] = 0x34;
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I2CPutRXRead(&write_addr[0],0x01,0x01);
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I2CGetRXData(&write_addr[0],&write_data[0]);
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fast_uart(data[0]);
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i2c_control();
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if(wr_addr == 0x00)
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{
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wr_addr = 0x03;
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}
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else
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{
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wr_addr--;
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}
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}
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}
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void timer1_isr ()
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__interrupt TF1_ISR
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{
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__asm
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mov a,_tx_rx //(2 cycles. Move the state into the accumulator.)
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CJNE A, #0x02, state //(4 cycles. If in halt state, do nothing.)
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ajmp finish //(3 cycles. Return from ISR if buffer is not ready to shift the data out.)
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state:
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djnz _bit_count,cont; //(4 cycles. This is sued to keep track of the number of data bytes which need to be shifted out.)
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mov _tx_rx,#0x02 //(3 cycles. Set our current status to busy so nothing else can interrupt us till we shift data in or out.)
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ajmp finish //(3 cycles. If data has been shifted, but has not been read, then jump to finish.)
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cont:
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orl _OEA,#0x40 //(3 cycles. First always set out clock pin direction. This is needed as discussed already in comments.)
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clr _PA6 //(2 cycles. Set the SCL line low.)
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mov a,_tx_rx //(2 cycles. Move the state back into the accumulator.)
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CJNE A, #0x00, rx //(4 cycles. Check if we are in RX or TX mode.)
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tx:
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orl _OEA,#0x80 //(3 cycles. We are in TX mode. Set the SDA direction.)
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mov a, _tx_i2c_buffer //(2 cycles. Move the data which needs to be transmitted into the accumulator.)
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rlc a //(1 cycles. Rotate and move the bit which needs to be sent out into the carry.)
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mov _PA7, c //(2 cycles. Move the data into the SDA pin.)
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mov _tx_i2c_buffer,a //(2 cycles. Now move the data back so that the next rotate can be performed when the ISR executes.)
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sjmp sclh //(3 cycles. Jump to toggle SCL now.)
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rx:
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anl _OEA,#0x7f //(3 cycles. Set the mode of SDA pin again.)
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mov a, _tx_i2c_buffer //(2 cycles. Move data received into accumulator.)
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mov c,_PA7 //(2 cycles. Move the SDA line value into the carry. Delay has already been introduced between setting clock low and reading the first bit of data. Otherwise, follow the MPSSE i2c routine.)
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rlc a //(1 cycle. Since the next bit will be received in the same ISR we need to shift the data.)
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mov _tx_i2c_buffer,a //(2 cycles. Move the data back into accumulator for next ISR execution routine)
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nop //(1 cycle. Wait for 1 cycle before setting the bit high again.)
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sclh:
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setb _PA6 //(2 cycles. Set the SCL high)
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finish:
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nop
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__endasm;
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}
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/**************************
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Will be DELETED once the pull requests are merged
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**************************/
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void fast_uart(BYTE a) {
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OEA |= 0x04;
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//An efficient UART bitbang routine in assembly
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__asm
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//Like #define in C. Can easily be used to change the pin
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.equ TX_PIN, _PA2
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//Disable interrupts
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clr _EA
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//Move the data to be sent into the ACC
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mov a , dpl
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//Clear carry
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clr c
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//We need to send out 8 bits of data
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//Load r0 with value 8
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mov r0, #0x08;
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//Create the start bit
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clr TX_PIN;
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//Precalculated delay since 1 cycle takes 88.33ns
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//Mov takes 2 cycles
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mov r1, #0x22;
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0006$:
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//DJNZ on Rn takes 3 cycle. This waits for
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//23*3, 69 cycles
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//71 cycle delay
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djnz r1, 0006$;
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//Add 2 more cycles of delay
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//97 cycles
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nop;
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nop;
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0001$:
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//2 cycles
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rrc a;
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//Move the carry into the port
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mov _PA2, c
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//Now we need to add delay for the next
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//2 cycles of delay
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mov r1, #0x1F;
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//31*3 , 93 cycles of delay
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0004$:
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djnz r1, 0004$;
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//1 more cycle, now upto 94
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nop;
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//3 more cycles of delay
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//97 cycles
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djnz r0, 0001$;
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setb _PA2;
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mov r1, #0x80;
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0005$:
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djnz r1, 0005$;
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nop
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setb _EA;
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__endasm;
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}

‎include/i2c/i2c_utils.h‎

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#ifndef I2C_UTILS_
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#define I2C_UTILS_
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#include "fx2regs.h"
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#include "fx2types.h"
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#define I2C_ELEMENTS 5
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#define I2C_DATA 5
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#define I2C_ADDR 5
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#define I2C_SIZE (I2C_ELEMENTS + 1)
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#define SCL PA6
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#define SDA PA7
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#define SYNCDELAY SYNCDELAY4
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//Structure for writing the I2C data onto SDA and SCL
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struct i2c_client
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{
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//Address
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unsigned short addr[I2C_ADDR];
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//Upto 5 data bytes can be written
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BYTE data[I2C_DATA];
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//The length of data to write to I2C lines
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//Does not include the address byte
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BYTE data_length;
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BYTE addr_length;
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};
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//Structure for reading data from I2C device.
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struct i2c_client_read
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{
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//Address
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unsigned short addr[I2C_ADDR];
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//The length of data to write to I2C lines
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//Does not include the address byte
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BYTE data_length;
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BYTE addr_length;
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};
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__bit I2CPutTX(BYTE * addr, BYTE * data, BYTE addr_length, BYTE data_length);
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__bit I2CPutRXRead(BYTE * addr, BYTE addr_length, BYTE data_length);
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__bit I2CGetRXRead();
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__bit I2CCheckRXRead();
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__bit I2CPutRXData(BYTE * addr, BYTE * data, BYTE addr_length, BYTE data_length);
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__bit I2CGetRXData(BYTE * addr, BYTE * data);
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__bit I2CCheckRXData();
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__bit I2CGetTX();
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__bit I2CCheckTX();
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void i2c_init(BYTE retry);
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void i2c_control();
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void configure_start_timer();
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/*************************
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I2C Controller
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*************************/
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enum isr_state
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{
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state_tx = 0, //0
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state_rx = 1 , //1
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state_wait = 2
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};
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enum i2c_states
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{
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idle = 0,
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start = 1,
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address = 2,
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addr_ack = 3,
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data_write = 4,
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data_write_ack = 5,
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data_read = 6,
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data_read_ack = 7,
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stop = 8,
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read_addr_ack = 9,
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read_data_ack = 10,
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};
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extern enum isr_state tx_rx;
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extern BYTE bit_count;
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extern BYTE tx_i2c_buffer;
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//Variable declarations for address and data
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extern __xdata BYTE addr[I2C_ADDR];
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extern __xdata BYTE data[I2C_DATA];
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extern __xdata BYTE length;
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extern __xdata BYTE retries;
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/****************************************
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Cant pass so many arguments in a function
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*****************************************/
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extern __xdata BYTE write_addr[I2C_ADDR];
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extern __xdata BYTE write_data[I2C_DATA];
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extern __xdata BYTE rx_addr_length;
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extern __xdata BYTE rx_data_length;
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extern __xdata BYTE wr_addr;
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#endif

‎lib/Makefile‎

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# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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AS8051?=sdas8051
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SOURCES = serial.c i2c.c delay.c setupdat.c gpif.c eputils.c $(wildcard interrupts/*.c)
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SOURCES = serial.c i2c.c delay.c setupdat.c gpif.c eputils.c softuart.c $(wildcard interrupts/*.c) $(wildcard i2c/*.c)
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FX2_OBJS = $(patsubst %.c,%.rel, $(SOURCES)) usbav.rel
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INCLUDES = -I../include
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SDCC = sdcc -mmcs51 $(SDCCFLAGS)

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