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_config.yml

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avatar: /assets/images/tim-thijm.jpg
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bio: "Tim is a PhD candidate at Princeton University, where he is currently advised by Prof. Aarti Gupta. Tim completed his BSc at the University of Toronto in 2018 in Computer Science and English."
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schmid:
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name: Stefan Schmid
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site: https://www.univie.ac.at/ct/stefan/
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avatar: /assets/images/schmid.jpg
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bio: "Stefan Schmid is a Full Professor at the University of Vienna, Austria. MSc and PhD at ETH Zurich, Postdoc at TU Munich and University of Paderborn, Senior Research Scientist at T-Labs in Berlin, and Associate Professor at Aalborg University, Denmark. Stefan Schmid is interested in the fundamental and algorithmic problems underlying networked systems. He received the IEEE Communications Society ITC Early Career Award 2016 and an ERC Consolidator Grant 2019.
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"
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srba:
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name: Jiri Srba
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site: http://people.cs.aau.dk/~srba/
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avatar: /assets/images/srba.jpg
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bio: "Jiri Srba is a Full Professor in computer science at Aalborg University, Denmark. He holds MSc from Faculty of Informatics, Masaryk University in Brno and PhD degree from Aarhus University. Since 2005, he has been employed at Aalborg University. Jiri Srba is interested in applying formal methods such as model checking into industrial cases from computer networking, supervisory control and wireless adhoc networks.
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"
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akella:
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name: Aditya Akella
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site: http://pages.cs.wisc.edu/~akella/
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avatar: /assets/images/aditya-akella.jpg
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bio: "Aditya Akella is a Professor of Computer Sciences at the University of Wisconsin-Madison, where he leads the Wisconsin Internet and Systems Research (WISR) Lab, and a Visiting Scientist at Google. Aditya has also been a Visiting Researcher at Microsoft (2014), a Visiting Associate Professor at the University of Washington (2013), and a Postdoc at Stanford University (2005-2006). Aditya has received numerous awards, including a Finalist for the Blavatnik National Award for Young Scientists (2020), an H.I. Romnes Faculty Fellowship (2018), SACM Student Choice Professor of the Year (COW) Award (2017, 2019), the Internet Engineering Task Force (IETF) Applied Networking Research Prize (2015), and the ACM SIGCOMM Rising Star Award (2014). Aditya received a Ph.D. in Computer Science from Carnegie Mellon University (2005) and a B.Tech. in Computer Science from Indian Insitute of Technology, Madras (2000)."
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bio: "Aditya Akella is a Professor of Computer Sciences at the University of Wisconsin-Madison, where he leads the Wisconsin Internet and Systems Research (WISR) Lab, and a Visiting Scientist at Google. Aditya has also been a Visiting Researcher at Microsoft (2014), a Visiting Associate Professor at the University of Washington (2013), and a Postdoc at Stanford University (2005-2006). Aditya has received numerous awards, including a Finalist for the Blavatnik National Award for Young Scientists (2020), an H.I. Romnes Faculty Fellowship (2018), SACM Student Choice Professor of the Year (COW) Award (2017, 2019), the Internet Engineering Task Force (IETF) Applied Networking Research Prize (2015), and the ACM SIGCOMM Rising Star Award (2014). Aditya received a Ph.D. in Computer Science from Carnegie Mellon University (2005) and a B.Tech. in Computer Science from Indian Insitute of Technology, Madras (2000)."
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gemberjacobson:
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name: Aaron Gember-Jacobson

_posts/2020-07-09-aalwines.md

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---
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layout: post
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title: "Toward Polynomial-Time Verification of Networks with Infinite State Spaces: An Automata-Theoretic Approach"
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subtitle: "The AalWiNes What-if Analysis Suite"
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authors: [schmid, srba]
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categories: [research, network, verification]
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image: assets/images/aalwines-screenshot.png
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tags: []
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---
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With the increasing scale of communication networks,
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failures (e.g. link failures) are becoming the norm rather than the
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exception. Given the critical role such networks play for our
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digital society, it is important to ensure a reliable and
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efficient operation of such networks, even in the presence
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of one or multiple failures.
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While several interesting automated approaches to
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verify and operate networks are emerging, offering an attractive
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alternative to today’s pragmatic and manual “fix it when it breaks” approach, existing solutions often only provide a limited and inefficient
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support for reasoning about failure
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scenarios. In particular, verifying networks is a complex task, even for computers. For example, many existing automated
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solutions require to test each possible failure scenario (respectively, each possible dataplane) individually, resulting in a runtime which can be exponential in the number of failures; which makes this approach impractical for large-scale communication networks. In fact, certain communication networks, such as networks based on MultiPath Label Switching (MPLS) or Segment Routing (SR), may even have a theoretically infinite configuration space: in MPLS and SR networks, default routes as well as failover routes depend on the label stack in the packet header, which may grow and shrink arbitrarily along the route.
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In this article, we argue that automata-theoretic approaches can offer an interesting solution to these problems, allowing to perform fast verification, accounting even for failure scenarios and dealing with potentially infinite state spaces.
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## A case for verifying network configurations
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Before delving into the details, we first argue that it is often attractive to verify the
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network configuration directly: compared to verifying
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control plane protocols, analyzing the dataplane
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configuration (e.g., forwarding and conditional
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failover tables) has the advantage that it
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also accounts for possible external changes,
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e.g., manual changes through the CLI, bugs, or
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changes made by
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additional protocols. Moreover, dataplane-based approaches can also reveal
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problems in the network operation introduced by the algorithms
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that generate the routing tables from the control plane specifications.
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Let us consider the verification of forwarding rules in MPLS routing tables as an example.
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In a nutshell, in MPLS, packet labels can be nested
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in order to provide tunneling through the network or to handle link
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failures by the fast-reroute mechanism. This mechanism relies on pushing a new MPLS
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label on top of the label stack, to redirect the flow
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to go around the failed link. The mechanism can be applied several times
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in case of multiple link failures, creating larger and larger (in theory: unbounded)
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numbers of MPLS labels on the label-stack.
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A fairly general query language which supports to reason about network behavior under failures could be based on regular expressions:
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$ < a > b < c > k $
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Here $a$ and $c$ are regular expressions over MPLS labels that describe the
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set of allowed initial resp. final headers of packets in the
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trace, $b$ is a regular expression over the links in the network, defining the set
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of allowed routing traces through the network, and $k$ is a number
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specifying the maximum number of failed links to be accounted for.
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By using regular expressions, we can test properties such as waypoint enforcement (e.g., is the
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traffic always forwarded through an intrusion detection system)
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or avoidance of certain routers in selected countries.
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## How does polynomial-time what-if analysis work?
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In order to evaluate such queries and conduct what-if analysis quickly, we make the case for a model-checking algorithm
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which is based on automata theory. Our approach is motivated by a natural (but not well-known) connection to the theory
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of pushdown automata and prefix rewriting systems.
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In a nutshell, given the network configuration, the routing tables,
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as well as the query, a pushdown automaton (PDA) can be constructed.
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On this PDA, we can then perform a standard reachability analysis. In more details,
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the regular expressions for the initial header and the final
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header of the query can each be converted to first a
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Nondeterministic Finite Automaton (NFA) and then to a Pushdown
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Automaton (PDA). The path query is converted to an NFA, which can then be used to restrict (by synchronous product)
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the behavior of the PDA constructed based on the network model.
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The three PDAs can be combined into a single PDA that can be given
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to the backend engine that checks the emptiness of the PDA language.
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In case the language is nonempty, we can return a witness trace
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to demonstrate the reason why the query is satisfied. All these operations can be performed in polynomial time,
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leveraging a classic result by J. Büchi.
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## The AalWiNes Tool and Example
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As a case study and to explore the feasibility of such an automata-theoretic approach,
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we developed a framework, the AalWiNes suite, which allows to load an arbitrary network topology
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(e.g., from the topology zoo dataset) as well as a set of router configurations (e.g., from Juniper routers).
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The configurations are put into a standardized, intermediate format which is vendor independent.
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The user can then define a query as described above, which leads the tool to prompt with a result
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(e.g. a trace). AalWiNes is a joint work at Aalborg University and the University of Vienna.
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For MPLS specifically, we have devloped the AalWiNes tool suite, implemented in C++, and improving upon an earlier
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prototype implementation in Python [[1]](#references).
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The tool allows to verify a wide range of important network properties in polynomial time,
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parameterized by the $k$.
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Here is a quick intro to AalWines, using an interative
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web-browser integration of our tool available at [demo.aalwines.cs.aau.dk](https://demo.aalwines.cs.aau.dk/):
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[![AalWiNes Quick Intro](http://img.youtube.com/vi/mvXAn9i7_Q0/0.jpg)](http://www.youtube.com/watch?v=mvXAn9i7_Q0 "AalWiNes Quick Intro")
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AalWiNes also allows to account for more complex traffic engineering aspects, such as load-balancing,
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by supporting nondeterminism, as well as more complex multi-operation chains.
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The tool includes several optimizations to further improve the performance, such as “top of stack reduction”,
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which safely calculates which labels can be at the top of stack in a given state of the PDA: the top of stack
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reduction technique greatly reduces the amount of transitions in the PDA.
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We refer to our [tool website](https://aalwines.cs.aau.dk/) as well as to our
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[project website](https://github.com/DEIS-Tools/AalWiNes).
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## Conclusion and future work
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Our aim is to provide a low runtime which is critical for the success of network
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verification, however, reasoning about failures seems particularly challenging with respect to the computational complexity.
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While not every network may allow for a polynomial-time analysis,
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we see much potential in automata-theoretic approaches,
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and we hope this article can inspire the community to conduct more research
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in this area.
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We understand our approach as a first step and believe that it opens the door to
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verify many other infinite state systems whose configurations
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cannot explicitly be represented anymore.
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For example, we have recently extended AalWiNes to support a witness trace generation which
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accounts for additional metrics; for example, the tool can now select (among a possibly infinite number of witness traces)
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the ones that minimize the number of hops, latency, or the stack height that corresponds to the number
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of MPLS tunnels. This is
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achieved by extending the PDA reachability analysis with multi-dimensional weights.
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Another interesting avenue for future research is
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the study of similar approaches for control plane verification
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or for supporting capacity planning, also taking into account
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resource constraints on failover paths.
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## References
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\[1\] : P-Rex: Fast Verification of MPLS Networks with Multiple Link Failures.
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Jesper Stenbjerg Jensen, Troels Beck Krogh, Jonas Sand Madsen, Stefan Schmid, Jiri Srba,
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and Marc Tom Thorgersen. 14th ACM International Conference on emerging Networking EXperiments
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and Technologies (CoNEXT), Heraklion/Crete, Greece, December 2018.
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