@@ -42,17 +42,15 @@ void pwr_init(pwr_idx_t idx)
4242{
4343 int dp_raw = 0 , dp_cnt = 0 ;
4444
45- dac_output_voltage ( DAC_CHANNEL_1 , 0 );
46- dac_output_voltage ( DAC_CHANNEL_2 , 0 );
45+ adc2_config_channel_atten ( ADC_CHANNEL_9 , ADC_ATTEN_DB_0 );
46+
4747 dac_output_disable (DAC_CHANNEL_1 );
4848 dac_output_disable (DAC_CHANNEL_2 );
4949
50- adc2_config_channel_atten ( ADC_CHANNEL_9 , ADC_ATTEN_DB_0 );
50+ vTaskDelay ( 50 / portTICK_RATE_MS );
5151
52- dac_output_enable (DAC_CHANNEL_1 );
5352 dac_output_voltage (DAC_CHANNEL_1 , 255 * (0.325 / 3.3 ));
54-
55- vTaskDelay (50 / portTICK_RATE_MS );
53+ dac_output_enable (DAC_CHANNEL_1 );
5654
5755 adc2_get_raw (ADC_CHANNEL_9 , ADC_WIDTH_BIT_12 , & dp_raw );
5856
@@ -64,13 +62,13 @@ void pwr_init(pwr_idx_t idx)
6462 goto pwr_exit ;
6563 }
6664
67- vTaskDelay (1000 / portTICK_RATE_MS );
68-
6965 do {
7066 adc2_get_raw (ADC_CHANNEL_9 , ADC_WIDTH_BIT_12 , & dp_raw );
7167
7268 vTaskDelay (10 / portTICK_RATE_MS );
73- } while (dp_raw > 255 && ++ dp_cnt < 100 );
69+ } while (dp_raw > 255 && ++ dp_cnt < 150 );
70+
71+ dac_output_disable (DAC_CHANNEL_1 );
7472
7573 if (dp_raw > 255 ) {
7674 pwr_mode = PWR_IDX_DCP ;
@@ -79,30 +77,30 @@ void pwr_init(pwr_idx_t idx)
7977 }
8078
8179 switch (idx ) {
80+ default :
8281 case PWR_IDX_QC_5V :
8382 pwr_mode = PWR_IDX_QC_5V ;
8483
85- dac_output_enable (DAC_CHANNEL_2 );
8684 dac_output_voltage (DAC_CHANNEL_1 , 255 * (0.6 / 3.3 ));
8785 dac_output_voltage (DAC_CHANNEL_2 , 255 * (0.0 / 3.3 ));
86+ dac_output_enable (DAC_CHANNEL_1 );
87+ dac_output_enable (DAC_CHANNEL_2 );
8888 break ;
8989 case PWR_IDX_QC_9V :
9090 pwr_mode = PWR_IDX_QC_9V ;
9191
92- dac_output_enable (DAC_CHANNEL_2 );
9392 dac_output_voltage (DAC_CHANNEL_1 , 255 * (3.3 / 3.3 ));
9493 dac_output_voltage (DAC_CHANNEL_2 , 255 * (0.6 / 3.3 ));
94+ dac_output_enable (DAC_CHANNEL_1 );
95+ dac_output_enable (DAC_CHANNEL_2 );
9596 break ;
9697 case PWR_IDX_QC_12V :
9798 pwr_mode = PWR_IDX_QC_12V ;
9899
99- dac_output_enable (DAC_CHANNEL_2 );
100100 dac_output_voltage (DAC_CHANNEL_1 , 255 * (0.6 / 3.3 ));
101101 dac_output_voltage (DAC_CHANNEL_2 , 255 * (0.6 / 3.3 ));
102- break ;
103- default :
104- pwr_mode = PWR_IDX_DCP ;
105-
102+ dac_output_enable (DAC_CHANNEL_1 );
103+ dac_output_enable (DAC_CHANNEL_2 );
106104 break ;
107105 }
108106
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