From 2bbc2d8c11c21556e5cf8d980e2234c84e4589a8 Mon Sep 17 00:00:00 2001 From: Nessotrin Date: Thu, 14 Aug 2025 05:48:13 +0200 Subject: [PATCH 1/2] fix(c0): missing GPIO_AF0_USART2 for STM32C051xx See https://github.com/STMicroelectronics/stm32c0xx-hal-driver/issues/4 Signed-off-by: Nessotrin Co-authored-by: Frederic Pillon --- libraries/SrcWrapper/inc/stm32_def.h | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/libraries/SrcWrapper/inc/stm32_def.h b/libraries/SrcWrapper/inc/stm32_def.h index 4890cc3b84..6c96a7be6d 100644 --- a/libraries/SrcWrapper/inc/stm32_def.h +++ b/libraries/SrcWrapper/inc/stm32_def.h @@ -222,9 +222,14 @@ __STATIC_INLINE void LL_RTC_SetBinMixBCDU(RTC_TypeDef *RTCx, uint32_t BinMixBcdU #define GPIO_AF1_SPI1 STM_PIN_AFNUM_MASK #endif -#if defined(STM32C0xx) && defined(USART3) && !defined(GPIO_AF7_USART3) - #define GPIO_AF7_USART3 ((uint8_t)0x07) -#endif // STM32C0xx && !defined(USART3) +#if defined(STM32C0xx) + #if defined(USART3) && !defined(GPIO_AF7_USART3) + #define GPIO_AF7_USART3 ((uint8_t)0x07) + #endif /* USART3 & !GPIO_AF7_USART3*/ + #if defined(STM32C051xx) && !defined(GPIO_AF0_USART2) + #define GPIO_AF0_USART2 ((uint8_t)0x00) + #endif +#endif // STM32C0xx #if defined(STM32WBAxx) && defined(USB_OTG_HS) && !defined(GPIO_AF4_USB_OTG_HS) #define GPIO_AF4_USB_OTG_HS GPIO_AF4_OTG_HS From a27d6c8a82b4915028fb76724afe8ca56b6ff17a Mon Sep 17 00:00:00 2001 From: Nessotrin Date: Thu, 14 Aug 2025 05:50:34 +0200 Subject: [PATCH 2/2] variant(c0): add generic C051Cx Signed-off-by: Nessotrin Co-authored-by: Frederic Pillon --- README.md | 1 + boards.txt | 36 ++++ .../STM32C0xx/C051C(6-8)(T-U)/generic_clock.c | 30 ++- .../STM32C0xx/C051C(6-8)(T-U)/ldscript.ld | 188 ++++++++++++++++++ 4 files changed, 253 insertions(+), 2 deletions(-) create mode 100644 variants/STM32C0xx/C051C(6-8)(T-U)/ldscript.ld diff --git a/README.md b/README.md index 510337a3b3..0e29549f14 100644 --- a/README.md +++ b/README.md @@ -229,6 +229,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | :green_heart: | STM32C011J4
STM32C011J6 | Generic Board | *2.8.0* | | | :green_heart: | STM32C031C4
STM32C031C6 | Generic Board | *2.5.0* | | | :green_heart: | STM32C031F4
STM32C031F6 | Generic Board | *2.6.0* | | +| :yellow_heart: | STM32C051C6
STM32C051C8 | Generic Board | **2.12.0** | | | :green_heart: | STM32C071G8
STM32C071GB | Generic Board | *2.11.0* | | | :green_heart: | STM32C071R8
STM32C071RB | Generic Board | *2.9.0* | | | :yellow_heart: | STM32C092CB
STM32C092CC| Generic Board | **2.12.0** | STM32C092CBT since 2.11.0 | diff --git a/boards.txt b/boards.txt index eff79e815c..5e3760b9af 100644 --- a/boards.txt +++ b/boards.txt @@ -1882,6 +1882,42 @@ GenC0.menu.pnum.GENERIC_C031F6PX.build.product_line=STM32C031xx GenC0.menu.pnum.GENERIC_C031F6PX.build.variant=STM32C0xx/C031F(4-6)P GenC0.menu.pnum.GENERIC_C031F6PX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C031.svd +# Generic C051C6Tx +GenC0.menu.pnum.GENERIC_C051C6TX=Generic C051C6Tx +GenC0.menu.pnum.GENERIC_C051C6TX.upload.maximum_size=32768 +GenC0.menu.pnum.GENERIC_C051C6TX.upload.maximum_data_size=12288 +GenC0.menu.pnum.GENERIC_C051C6TX.build.board=GENERIC_C051C6TX +GenC0.menu.pnum.GENERIC_C051C6TX.build.product_line=STM32C051xx +GenC0.menu.pnum.GENERIC_C051C6TX.build.variant=STM32C0xx/C051C(6-8)(T-U) +GenC0.menu.pnum.GENERIC_C051C6TX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C051.svd + +# Generic C051C6Ux +GenC0.menu.pnum.GENERIC_C051C6UX=Generic C051C6Ux +GenC0.menu.pnum.GENERIC_C051C6UX.upload.maximum_size=32768 +GenC0.menu.pnum.GENERIC_C051C6UX.upload.maximum_data_size=12288 +GenC0.menu.pnum.GENERIC_C051C6UX.build.board=GENERIC_C051C6UX +GenC0.menu.pnum.GENERIC_C051C6UX.build.product_line=STM32C051xx +GenC0.menu.pnum.GENERIC_C051C6UX.build.variant=STM32C0xx/C051C(6-8)(T-U) +GenC0.menu.pnum.GENERIC_C051C6UX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C051.svd + +# Generic C051C8Tx +GenC0.menu.pnum.GENERIC_C051C8TX=Generic C051C8Tx +GenC0.menu.pnum.GENERIC_C051C8TX.upload.maximum_size=65536 +GenC0.menu.pnum.GENERIC_C051C8TX.upload.maximum_data_size=12288 +GenC0.menu.pnum.GENERIC_C051C8TX.build.board=GENERIC_C051C8TX +GenC0.menu.pnum.GENERIC_C051C8TX.build.product_line=STM32C051xx +GenC0.menu.pnum.GENERIC_C051C8TX.build.variant=STM32C0xx/C051C(6-8)(T-U) +GenC0.menu.pnum.GENERIC_C051C8TX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C051.svd + +# Generic C051C8Ux +GenC0.menu.pnum.GENERIC_C051C8UX=Generic C051C8Ux +GenC0.menu.pnum.GENERIC_C051C8UX.upload.maximum_size=65536 +GenC0.menu.pnum.GENERIC_C051C8UX.upload.maximum_data_size=12288 +GenC0.menu.pnum.GENERIC_C051C8UX.build.board=GENERIC_C051C8UX +GenC0.menu.pnum.GENERIC_C051C8UX.build.product_line=STM32C051xx +GenC0.menu.pnum.GENERIC_C051C8UX.build.variant=STM32C0xx/C051C(6-8)(T-U) +GenC0.menu.pnum.GENERIC_C051C8UX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C051.svd + # Generic C071G8Ux GenC0.menu.pnum.GENERIC_C071G8UX=Generic C071G8Ux GenC0.menu.pnum.GENERIC_C071G8UX.upload.maximum_size=65536 diff --git a/variants/STM32C0xx/C051C(6-8)(T-U)/generic_clock.c b/variants/STM32C0xx/C051C(6-8)(T-U)/generic_clock.c index ff0377381d..d72316b618 100644 --- a/variants/STM32C0xx/C051C(6-8)(T-U)/generic_clock.c +++ b/variants/STM32C0xx/C051C(6-8)(T-U)/generic_clock.c @@ -21,8 +21,34 @@ */ WEAK void SystemClock_Config(void) { - /* SystemClock_Config can be generated by STM32CubeMX */ -#warning "SystemClock_Config() is empty. Default clock at reset is used." + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + + __HAL_FLASH_SET_LATENCY(FLASH_LATENCY_1); + + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + Error_Handler(); + } + + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI; + RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) { + Error_Handler(); + } } #endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32C0xx/C051C(6-8)(T-U)/ldscript.ld b/variants/STM32C0xx/C051C(6-8)(T-U)/ldscript.ld new file mode 100644 index 0000000000..b68ab7b5a3 --- /dev/null +++ b/variants/STM32C0xx/C051C(6-8)(T-U)/ldscript.ld @@ -0,0 +1,188 @@ +/* +****************************************************************************** +** +** @file : LinkerScript.ld +** +** @author : Auto-generated by STM32CubeIDE +** +** @brief : Linker script for STM32C051C8Tx Device from STM32C0 series +** 64KBytes FLASH +** 12KBytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is, without any warranty +** of any kind. +** +****************************************************************************** +** @attention +** +** Copyright (c) 2025 STMicroelectronics. +** All rights reserved. +** +** This software is licensed under terms that can be found in the LICENSE file +** in the root directory of this software component. +** If no LICENSE file comes with this software, it is provided AS-IS. +** +****************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 12K + FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET +} + +/* Sections */ +SECTIONS +{ + + /* The startup code into "FLASH" Rom type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data into "FLASH" Rom type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data into "FLASH" Rom type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >FLASH + + .ARM (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >FLASH + + .preinit_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >FLASH + + .init_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >FLASH + + .fini_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >FLASH + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + *(.RamFunc) /* .RamFunc sections */ + *(.RamFunc*) /* .RamFunc* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM AT> FLASH + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +}