Rx reset issue

[suixin1314]

I purchased a new switch which switch configuration is an 8372n and an 8224.The silk screen print on the PCB is FG-8GT-1SX.
I tried to flash SWTG118AS-v2.0 rom in fm25q16a which i flashed otp sector and connected com.The switch is reporting repeated errors:NSQ=1 RXIDLE=0 SYNC_OK Rx reset!

==========Loader start===========
Press any key to start the normal procedure.
To run SPI flash viewer, press [v]
To enforce the download of the runtime kernel, press [ESC] .....
  cmd -1
    Check Runtime Image.....
    Chksum Correct!
    RunTime Kernel Starting....
NSQ=1 RXIDLE=0 SYNC_OK  Rx reset!
Ver8224: C
Ver8373_72: C



===========================Config Area pre-check Starts.=====================.
Pre-Check the config size structure is equal or not.
(sizeof(configCache)) a42.
(FLSH_ADDR_END-FLSH_CONFIG_ADDR_START) a42.
(FLSH_CONFIG_ADDR_START) 1fe000.
(FLSH_ADDR_END) 1fea42.
It seems no risk!..................
==============================Config Area pre-check ends.===================.



SalFlshCopyFlshToCache()
sal_sys_config_restore()
Restore dhcp state is: 0

Restore ip is: 10.10.1.34

...OK
sal_mirror_config_restore()...OK
sal_qos_config_restore()...OK
sal_vlan_config_restore()...OK
sal_rate_config_restore()...OK
sal_trunk_config_restore()...OK
sal_l2_config_restore()...OK
sal_loop_config_restore()...OK
sal_eee_config_restore()...OK
sal_stp_config_restore()...OK
sal_igmp_config_restore()...OK
sal_port_config_restore()...OK



#############According to the flash setting to set the WEB/DUMB mode

#############Read the web/dumb mode.....!!!###

#############web_dumb_cfg.vld_flag=-1, web_dumb_cfg.mode=-1
#############Begin to set the web mode


NSQ=1 RXIDLE=0 SYNC_OK  Rx reset!

################################################################

############Login Menu ############
### Please input uboot password below: ###
NSQ=1 RXIDLE=0 SYNC_OK  Rx reset!
NSQ=1 RXIDLE=0 SYNC_OK  Rx reset!
NSQ=1 RXIDLE=0 SYNC_OK  Rx reset!
NSQ=1 RXIDLE=0 SYNC_OK  Rx reset!
NSQ=1 RXIDLE=0 SYNC_OK  Rx reset!
NSQ=1 RXIDLE=0 SYNC_OK  Rx reset!
NSQ=1 RXIDLE=0 SYNC_OK  Rx reset!
NSQ=1 RXIDLE=0 SYNC_OK  Rx reset!

looping

I can access the manage web normally when I connect to the RJ45 port from the 8372n. The phy 8224 fanout all RJ45 ports cannot acess web manage but could view web manage find 8224 fan out 4 prots linked up to PC and switch. I cannot test the 10G port right now because there is no cable.
On the web manage page fix any date can not save in to flash when i repower this switch will reset factory setting.

[lotusmomo]

Try this firmware and use algorithm 1 in encuid2.

encuid2.zip

21132_HRRP_V200.1.16_ZX903-SWTGW218AS_0520_cn.zip

[suixin1314]

Try this firmware and use algorithm 1 in encuid2.

encuid2.zip

21132_HRRP_V200.1.16_ZX903-SWTGW218AS_0520_cn.zip

This firmware cannot boot and reboot looping in Config Area pre-check Starts.

==========Loader start V0.2===========
Press any key to start the normal procedure.
To run SPI flash viewer, press [v]
To enforce the download of the runtime kernel, press [ESC] .....
  cmd -1
    Check Runtime Image.....
    Chksum Correct!
    RunTime Kernel Starting....
Ver8372N=2
Ver8373N=2
NSQ=1 RXIDLE=0 SYNC_OK  Rx reset!
LINE 1472, RL6818C_pwr_on_patch_phy_v007 , patch 0xf finished!
LINE 1472, RL6818C_pwr_on_patch_phy_v007 , patch 0xf0 finished!



===========================Config Area pre-check Starts.=====================.
Pre-Check the config size structure is equal or not.
It seems no risk!..................
==============================Config Area pre-check ends.===================.



SalFlshCopyFlshToCache()
sal_sys_config_restore()
Restore dhcp state is: 0

Restore ip is: 192.168.2.1

...OK
sal_mirror_config_restore()...OK
sal_qos_config_restore()...OK
sal_vlan_config_restore()...OK
sal_rate_config_restore()...OK
sal_trunk_config_restore()...OK
sal_l2_config_restore()...OK
sal_loop_config_restore()...OK
sal_eee_config_restore()...OK
sal_stp_config_restore()...OK
sal_igmp_config_restore()...OK
sal_dhcp_snooping_config_restore()...OK
sal_port_config_restore()...OK


==========Loader start V0.2===========
Press any key to start the normal procedure.
To run SPI flash viewer, press [v]
To enforce the download of the runtime kernel, press [ESC] .....
  cmd -1
    Check Runtime Image.....
    Chksum Correct!
    RunTime Kernel Starting....
Ver8372N=2
Ver8373N=2
NSQ=1 RXIDLE=0 SYNC_OK  Rx reset!
LINE 1472, RL6818C_pwr_on_patch_phy_v007 , patch 0xf finished!
LINE 1472, RL6818C_pwr_on_patch_phy_v007 , patch 0xf0 finished!



===========================Config Area pre-check Starts.=====================.
Pre-Check the config size structure is equal or not.
It seems no risk!..................
==============================Config Area pre-check ends.===================.

[lotusmomo]

From the initial log and symptoms you posted, my early hypothesis is that the problem you are seeing on the FG-8GT-1SX board may be caused by inconsistent GPIO mapping and the Software Reset pin being held low on the board. This can cause the processor to continuously reset (e.g., the Rx reset message looping) even though the firmware checksum appears correct.

To help with further analysis and verification of this behavior, could you please provide a full dump of the stock firmware that was originally on your switch’s flash (before you attempted reflashing)?
Specifically:

• the original SPI NOR flash dump (full image)
• the original OTP / Secure Sector data
• any unique ID dump (if available)

Having the stock firmware image and Secure Sector data will allow us to compare the GPIO and reset-related configuration against the repository’s known images and better understand why this particular board is resetting repeatedly.

P.S. 睿颖 switches are designed differently from other manufacturers, please try to avoid purchasing products from this company.

[suixin1314]

From the initial log and symptoms you posted, my early hypothesis is that the problem you are seeing on the FG-8GT-1SX board may be caused by inconsistent GPIO mapping and the Software Reset pin being held low on the board. This can cause the processor to continuously reset (e.g., the Rx reset message looping) even though the firmware checksum appears correct.

To help with further analysis and verification of this behavior, could you please provide a full dump of the stock firmware that was originally on your switch’s flash (before you attempted reflashing)? Specifically:

• the original SPI NOR flash dump (full image)
• the original OTP / Secure Sector data
• any unique ID dump (if available)

Having the stock firmware image and Secure Sector data will allow us to compare the GPIO and reset-related configuration against the repository’s known images and better understand why this particular board is resetting repeatedly.

P.S. 睿颖 switches are designed differently from other manufacturers, please try to avoid purchasing products from this company.

Oh,I forget send this switch original SPI firmware to this issues. This device is 睿颖 switches. I tested this fir,ware on FM25Q16A. It original SPI FLASH used GD25Q32CSIG and I fined this SPI datesheet combined 3*1024-Byte Security Registers With OTP Locks. But I used Xgpro T48 read this SPI OTP sector date fined OTP Sector is empty.
About Reset Software GPIO Mapping issues,i see libc0607 BLOG log and hypothesis this firmware may not reach jump to RESET process.
This log is original firmware print,

LINE 2162,error SDS_MODE
LINE 1478, RL6818C_pwr_on_patch_phy_v007 , patch 0xf finished!
LINE 1478, RL6818C_pwr_on_patch_phy_v007 , patch 0xf0 finished!

RTL8371B start

FG-8GT-1SX-unmanager backup.zip