GitHub - Dieleman/origen_sim: Plugin to enable Origen patterns to be run in a dynamic Verilog simulation

Name		Name	Last commit message	Last commit date
Latest commit History 71 Commits
config		config
doc		doc
environment		environment
ext		ext
lib		lib
pattern		pattern
program		program
spec		spec
target		target
templates		templates
.autotest		.autotest
.gitignore		.gitignore
.irbrc		.irbrc
.rspec		.rspec
.travis.yml		.travis.yml
Gemfile		Gemfile
Gemfile.lock		Gemfile.lock
Rakefile		Rakefile
origen_sim.gemspec		origen_sim.gemspec