A 32 bit Microporocessor Based On a Subset of MIPS
An implementation of a 32 bit microprocessor based on a subset of the MIPS Instruction set architecture in Logisim. This work is solely for academic purposes.
This work was done and submitted as a course project for COE 381: Microprocessors at the Department of Computer Engineering, Kwame Nkrumah Univeristy of Science and Technology, Kumasi, Ghana. The aim of the project is to get an indepth understanding of the functioning of microporcessors and also to prepare for computer architecture and digital computer design.
- Clone this repo
git clone https://github.com/Kumbong/mini-mips.git
cd mini-mips
- Install Logisim
Note that Logisim development is suspended indefinitely. You can however download it from here - About MIPS
- Computer Architecture: A Quantitative Approach, Fifth Edition, John L. Hennessy and David A. Patterson
- Computer Organization and Design The Hardware /Software Interface, John L. Hennessy and David A. Patterson
- Digital Design and Computer Architecture, Second Edition, David Money Harris Sarah L. Harris
- Bilkent University Computer Organization Course By William Sawyer
MIT © Kumbong Hermann
Once you have Logisim you are good to go!😊. If you are unfamiliar with how to use logisim you can get started here. You can read the report or glance through the presentation slides to gain more insights on the design and the usage.Use the test files to run the simulation.
The instruction memory and data memory are ram modules. Before starting the simulation, be sure to restart the simulation.
For test 1 and test 2: In instruction memory, right click it and select “load image”. from there browse to the test files and select either “prog1.txt” or “prog2.txt”, and then in the data memory, right click, “load image”, and from test files, find either “mem1.txt” or “mem2.txt” respectively. When the tests are properly loaded, simply press CTRL+T (or CMD+T on mac) to cycle through the processor.
For test 3: In instruction memory, right click and select load image, from there browse to test files and select “test3.txt”.
When the tests are properly loaded, simply press CTRL+T (or CMD+T on mac) to cycle through the processor.
Pull requests are welcome. However I have discontinued work here. I will be focusing this time to work on the complete MIPS implemenation with pipelining implemented in VHDL or Verilog check my github for more.