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UDP Logic #44

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92c22f4
Added support for dcmac integration in linker.
hpc-aulmamei May 14, 2025
823a24d
Fixed a compilation bug.
hpc-aulmamei Jun 11, 2025
e81ee06
added resources/dcmac directory, added empty dcmac.tcl file
serbuvlad Jun 17, 2025
d78e404
Merge pull request #27 from serbuvlad/1-dmarc-integration
hpc-aulmamei Jun 17, 2025
da28afb
Integrate DCMAC logic supporting 200G interfaces (#28)
mariodruiz Jun 24, 2025
23b60ae
Added DCMAC example with two interfaces.
hpc-aulmamei Jul 21, 2025
342c2ee
DCMAC and related infrastructure driver
mariodruiz Jul 21, 2025
d1aa4b3
Add requirements.txt
mariodruiz Jul 21, 2025
16a1cbd
Merge pull request #35 from mariodruiz/network-drive
hpc-aulmamei Jul 22, 2025
bf3df0a
Merge main
mariodruiz Oct 27, 2025
778ebf3
Fix missing parameter
mariodruiz Oct 27, 2025
0b51c15
Initial attempt to bring UDP to SLASH
mariodruiz Oct 27, 2025
f7f471b
Trying to fix merge issue
mariodruiz Oct 31, 2025
11dbb96
Remove duplicate definition
mariodruiz Oct 31, 2025
9766b85
Remove more duplicated code
mariodruiz Oct 31, 2025
38f0dc4
Managing merge again
mariodruiz Oct 31, 2025
bc0a4dd
Exit when it's inside tcl
mariodruiz Oct 31, 2025
dd498ee
Add target
mariodruiz Oct 31, 2025
20ce4df
Initial code that builds
Nov 5, 2025
be30d2c
Copyright
Nov 5, 2025
9ed05bb
Copyright
Nov 5, 2025
22efa72
Enable Vivado 2025.1
Nov 5, 2025
8657c13
Uncomment QSFP pins. Fix #45
Nov 6, 2025
7ec8199
More progress toward benchmarking design
Nov 7, 2025
10e71cf
Add benchmarking kernels
Nov 8, 2025
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99 changes: 99 additions & 0 deletions deploy/aved.patch
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Original file line number Diff line number Diff line change
Expand Up @@ -2723,3 +2723,102 @@ index 87da637..4bec2d8 100644

/**
* update_fpt() - Download a PDI containing an FPT onto a device.
diff --git a/hw/amd_v80_gen5x8_24.1/src/constraints/impl.pins.xdc b/hw/amd_v80_gen5x8_24.1/src/constraints/impl.pins.xdc
index cef537a..b1c0bb0 100644
--- a/hw/amd_v80_gen5x8_24.1/src/constraints/impl.pins.xdc
+++ b/hw/amd_v80_gen5x8_24.1/src/constraints/impl.pins.xdc
@@ -272,50 +272,50 @@ set_property -dict { PACKAGE_PIN CG6 IOSTANDARD LVCMOS12 SLEW SLOW DRIV
set_property -dict { PACKAGE_PIN CH7 IOSTANDARD LVCMOS12 SLEW SLOW DRIVE 8 } [get_ports "smbus_0_sda_io"] ;# Bank 702 VCCO - VR_1V2_VCCO_DDR4

# Uncomment below qsfp and mcio pins as design requires
-# set_property -dict { PACKAGE_PIN AR51 } [get_ports "qsfp0_322mhz_clk_p"] ;# Bank 209 " GTM_REFCLKP0_209
-#
-# set_property -dict { PACKAGE_PIN AE67 } [get_ports "qsfp0_4x_grx_p[0]"] ;# Bank 209 " GTM_RXP0_209
-# set_property -dict { PACKAGE_PIN AE64 } [get_ports "qsfp0_4x_grx_p[1]"] ;# Bank 209 " GTM_RXP1_209
-# set_property -dict { PACKAGE_PIN AC67 } [get_ports "qsfp0_4x_grx_p[2]"] ;# Bank 209 " GTM_RXP2_209
-# set_property -dict { PACKAGE_PIN AC64 } [get_ports "qsfp0_4x_grx_p[3]"] ;# Bank 209 " GTM_RXP3_209
-#
-# set_property -dict { PACKAGE_PIN AG61 } [get_ports "qsfp0_4x_gtx_p[0]"] ;# Bank 209 " GTM_TXP0_209
-# set_property -dict { PACKAGE_PIN AG58 } [get_ports "qsfp0_4x_gtx_p[1]"] ;# Bank 209 " GTM_TXP1_209
-# set_property -dict { PACKAGE_PIN AE61 } [get_ports "qsfp0_4x_gtx_p[2]"] ;# Bank 209 " GTM_TXP2_209
-# set_property -dict { PACKAGE_PIN AE58 } [get_ports "qsfp0_4x_gtx_p[3]"] ;# Bank 209 " GTM_TXP3_209
-#
-# set_property -dict { PACKAGE_PIN AA67 } [get_ports "qsfp1_4x_grx_p[0]"] ;# Bank 210 " GTM_RXP0_210
-# set_property -dict { PACKAGE_PIN AA64 } [get_ports "qsfp1_4x_grx_p[1]"] ;# Bank 210 " GTM_RXP1_210
-# set_property -dict { PACKAGE_PIN W67 } [get_ports "qsfp1_4x_grx_p[2]"] ;# Bank 210 " GTM_RXP2_210
-# set_property -dict { PACKAGE_PIN W64 } [get_ports "qsfp1_4x_grx_p[3]"] ;# Bank 210 " GTM_RXP3_210
-#
-# set_property -dict { PACKAGE_PIN AC61 } [get_ports "qsfp1_4x_gtx_p[0]"] ;# Bank 210 " GTM_TXP0_210
-# set_property -dict { PACKAGE_PIN AC58 } [get_ports "qsfp1_4x_gtx_p[1]"] ;# Bank 210 " GTM_TXP1_210
-# set_property -dict { PACKAGE_PIN AA61 } [get_ports "qsfp1_4x_gtx_p[2]"] ;# Bank 210 " GTM_TXP2_210
-# set_property -dict { PACKAGE_PIN AA58 } [get_ports "qsfp1_4x_gtx_p[3]"] ;# Bank 210 " GTM_TXP3_210
-#
-# set_property -dict { PACKAGE_PIN AL17 } [get_ports "qsfp2_322mhz_clk_p"] ;# Bank 111 " GTM_REFCLKP0_111
-#
-# set_property -dict { PACKAGE_PIN U3 } [get_ports "qsfp2_4x_grx_p[0]"] ;# Bank 112 " GTM_RXP0_112
-# set_property -dict { PACKAGE_PIN U6 } [get_ports "qsfp2_4x_grx_p[1]"] ;# Bank 112 " GTM_RXP1_112
-# set_property -dict { PACKAGE_PIN R3 } [get_ports "qsfp2_4x_grx_p[2]"] ;# Bank 112 " GTM_RXP2_112
-# set_property -dict { PACKAGE_PIN R6 } [get_ports "qsfp2_4x_grx_p[3]"] ;# Bank 112 " GTM_RXP3_112
-#
-# set_property -dict { PACKAGE_PIN U9 } [get_ports "qsfp2_4x_gtx_p[0]"] ;# Bank 112 " GTM_TXP0_112
-# set_property -dict { PACKAGE_PIN U12 } [get_ports "qsfp2_4x_gtx_p[1]"] ;# Bank 112 " GTM_TXP1_112
-# set_property -dict { PACKAGE_PIN R9 } [get_ports "qsfp2_4x_gtx_p[2]"] ;# Bank 112 " GTM_TXP2_112
-# set_property -dict { PACKAGE_PIN R12 } [get_ports "qsfp2_4x_gtx_p[3]"] ;# Bank 112 " GTM_TXP3_112
-#
-# set_property -dict { PACKAGE_PIN AA3 } [get_ports "qsfp3_4x_grx_p[0]"] ;# Bank 111 " GTM_RXP0_111
-# set_property -dict { PACKAGE_PIN AA6 } [get_ports "qsfp3_4x_grx_p[1]"] ;# Bank 111 " GTM_RXP1_111
-# set_property -dict { PACKAGE_PIN W3 } [get_ports "qsfp3_4x_grx_p[2]"] ;# Bank 111 " GTM_RXP2_111
-# set_property -dict { PACKAGE_PIN W6 } [get_ports "qsfp3_4x_grx_p[3]"] ;# Bank 111 " GTM_RXP3_111
-#
-# set_property -dict { PACKAGE_PIN AA9 } [get_ports "qsfp3_4x_gtx_p[0]"] ;# Bank 111 " GTM_TXP0_111
-# set_property -dict { PACKAGE_PIN AA12 } [get_ports "qsfp3_4x_gtx_p[1]"] ;# Bank 111 " GTM_TXP1_111
-# set_property -dict { PACKAGE_PIN W9 } [get_ports "qsfp3_4x_gtx_p[2]"] ;# Bank 111 " GTM_TXP2_111
-# set_property -dict { PACKAGE_PIN W12 } [get_ports "qsfp3_4x_gtx_p[3]"] ;# Bank 111 " GTM_TXP3_111
-#
+ set_property -dict { PACKAGE_PIN AR51 } [get_ports "qsfp0_322mhz_clk_p"] ;# Bank 209 " GTM_REFCLKP0_209
+
+ set_property -dict { PACKAGE_PIN AE67 } [get_ports "qsfp0_4x_grx_p[0]"] ;# Bank 209 " GTM_RXP0_209
+ set_property -dict { PACKAGE_PIN AE64 } [get_ports "qsfp0_4x_grx_p[1]"] ;# Bank 209 " GTM_RXP1_209
+ set_property -dict { PACKAGE_PIN AC67 } [get_ports "qsfp0_4x_grx_p[2]"] ;# Bank 209 " GTM_RXP2_209
+ set_property -dict { PACKAGE_PIN AC64 } [get_ports "qsfp0_4x_grx_p[3]"] ;# Bank 209 " GTM_RXP3_209
+
+ set_property -dict { PACKAGE_PIN AG61 } [get_ports "qsfp0_4x_gtx_p[0]"] ;# Bank 209 " GTM_TXP0_209
+ set_property -dict { PACKAGE_PIN AG58 } [get_ports "qsfp0_4x_gtx_p[1]"] ;# Bank 209 " GTM_TXP1_209
+ set_property -dict { PACKAGE_PIN AE61 } [get_ports "qsfp0_4x_gtx_p[2]"] ;# Bank 209 " GTM_TXP2_209
+ set_property -dict { PACKAGE_PIN AE58 } [get_ports "qsfp0_4x_gtx_p[3]"] ;# Bank 209 " GTM_TXP3_209
+
+ set_property -dict { PACKAGE_PIN AA67 } [get_ports "qsfp1_4x_grx_p[0]"] ;# Bank 210 " GTM_RXP0_210
+ set_property -dict { PACKAGE_PIN AA64 } [get_ports "qsfp1_4x_grx_p[1]"] ;# Bank 210 " GTM_RXP1_210
+ set_property -dict { PACKAGE_PIN W67 } [get_ports "qsfp1_4x_grx_p[2]"] ;# Bank 210 " GTM_RXP2_210
+ set_property -dict { PACKAGE_PIN W64 } [get_ports "qsfp1_4x_grx_p[3]"] ;# Bank 210 " GTM_RXP3_210
+
+ set_property -dict { PACKAGE_PIN AC61 } [get_ports "qsfp1_4x_gtx_p[0]"] ;# Bank 210 " GTM_TXP0_210
+ set_property -dict { PACKAGE_PIN AC58 } [get_ports "qsfp1_4x_gtx_p[1]"] ;# Bank 210 " GTM_TXP1_210
+ set_property -dict { PACKAGE_PIN AA61 } [get_ports "qsfp1_4x_gtx_p[2]"] ;# Bank 210 " GTM_TXP2_210
+ set_property -dict { PACKAGE_PIN AA58 } [get_ports "qsfp1_4x_gtx_p[3]"] ;# Bank 210 " GTM_TXP3_210
+
+ set_property -dict { PACKAGE_PIN AL17 } [get_ports "qsfp2_322mhz_clk_p"] ;# Bank 111 " GTM_REFCLKP0_111
+
+ set_property -dict { PACKAGE_PIN U3 } [get_ports "qsfp2_4x_grx_p[0]"] ;# Bank 112 " GTM_RXP0_112
+ set_property -dict { PACKAGE_PIN U6 } [get_ports "qsfp2_4x_grx_p[1]"] ;# Bank 112 " GTM_RXP1_112
+ set_property -dict { PACKAGE_PIN R3 } [get_ports "qsfp2_4x_grx_p[2]"] ;# Bank 112 " GTM_RXP2_112
+ set_property -dict { PACKAGE_PIN R6 } [get_ports "qsfp2_4x_grx_p[3]"] ;# Bank 112 " GTM_RXP3_112
+
+ set_property -dict { PACKAGE_PIN U9 } [get_ports "qsfp2_4x_gtx_p[0]"] ;# Bank 112 " GTM_TXP0_112
+ set_property -dict { PACKAGE_PIN U12 } [get_ports "qsfp2_4x_gtx_p[1]"] ;# Bank 112 " GTM_TXP1_112
+ set_property -dict { PACKAGE_PIN R9 } [get_ports "qsfp2_4x_gtx_p[2]"] ;# Bank 112 " GTM_TXP2_112
+ set_property -dict { PACKAGE_PIN R12 } [get_ports "qsfp2_4x_gtx_p[3]"] ;# Bank 112 " GTM_TXP3_112
+
+ set_property -dict { PACKAGE_PIN AA3 } [get_ports "qsfp3_4x_grx_p[0]"] ;# Bank 111 " GTM_RXP0_111
+ set_property -dict { PACKAGE_PIN AA6 } [get_ports "qsfp3_4x_grx_p[1]"] ;# Bank 111 " GTM_RXP1_111
+ set_property -dict { PACKAGE_PIN W3 } [get_ports "qsfp3_4x_grx_p[2]"] ;# Bank 111 " GTM_RXP2_111
+ set_property -dict { PACKAGE_PIN W6 } [get_ports "qsfp3_4x_grx_p[3]"] ;# Bank 111 " GTM_RXP3_111
+
+ set_property -dict { PACKAGE_PIN AA9 } [get_ports "qsfp3_4x_gtx_p[0]"] ;# Bank 111 " GTM_TXP0_111
+ set_property -dict { PACKAGE_PIN AA12 } [get_ports "qsfp3_4x_gtx_p[1]"] ;# Bank 111 " GTM_TXP1_111
+ set_property -dict { PACKAGE_PIN W9 } [get_ports "qsfp3_4x_gtx_p[2]"] ;# Bank 111 " GTM_TXP2_111
+ set_property -dict { PACKAGE_PIN W12 } [get_ports "qsfp3_4x_gtx_p[3]"] ;# Bank 111 " GTM_TXP3_111
+
# set_property -dict { PACKAGE_PIN BP53 } [get_ports "mcio0_100mhz_clk_p"] ;# Bank 200 " GTYP_REFCLKP0_200
#
# set_property -dict { PACKAGE_PIN BP66 } [get_ports "mcio0_4x_grx_p[0]"] ;# Bank 200 " GTYP_RXP0_200
51 changes: 51 additions & 0 deletions examples/06_dcmac/06_dcmac.cpp
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@@ -0,0 +1,51 @@
/**
* The MIT License (MIT)
* Copyright (c) 2025 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of this software
* and associated documentation files (the "Software"), to deal in the Software without restriction,
* including without limitation the rights to use, copy, modify, merge, publish, distribute,
* sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all copies or
* substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT
* NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/

#include <iostream>
#include <cstring>

#include <api/device.hpp>
#include <api/buffer.hpp>
#include <api/kernel.hpp>

int main(int argc, char* argv[]) {
try {
if (argc < 3) {
std::cerr << "Usage: " << argv[0] << " <BDF> <vrtbin file>" << std::endl;
return 1;
}
std::string bdf = argv[1];
std::string vrtbinFile = argv[2];
vrt::utils::Logger::setLogLevel(vrt::utils::LogLevel::DEBUG);
uint32_t size = 1024;

vrt::Device device(bdf, vrtbinFile);
vrt::Kernel traffic_producer_0(device, "traffic_producer_0");
vrt::Kernel traffic_producer_1(device, "traffic_producer_1");
traffic_producer_0.start(100, 0);
traffic_producer_0.wait();
traffic_producer_1.start(100, 1);
traffic_producer_1.wait();
device.cleanup();
} catch (std::exception const& e) {
std::cerr << "Exception: " << e.what() << std::endl;
return 1;
}
}
41 changes: 41 additions & 0 deletions examples/06_dcmac/CMakeLists.txt
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# ##################################################################################################
# The MIT License (MIT)
# Copyright (c) 2025 Advanced Micro Devices, Inc. All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a copy of this software
# and associated documentation files (the "Software"), to deal in the Software without restriction,
# including without limitation the rights to use, copy, modify, merge, publish, distribute,
# sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is
# furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in all copies or
# substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT
# NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
# DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
# ##################################################################################################

cmake_minimum_required(VERSION 3.10)
project(00_axilite)

set(CMAKE_CXX_STANDARD 20)
set(CMAKE_CXX_STANDARD_REQUIRED ON)
set(CMAKE_CXX_FLAGS "-O3")

# Include directories
include_directories(/usr/local/vrt/include
/usr/include/ami
/usr/include/libxml2
/usr/include/jsoncpp)

# Define sources for the executable
set(EXE_SOURCES 06_dcmac.cpp)

# Create the executable
add_executable(${PROJECT_NAME} ${EXE_SOURCES})

# Link the library to the executable
target_link_libraries(${PROJECT_NAME} vrt ami xml2 zmq jsoncpp)
61 changes: 61 additions & 0 deletions examples/06_dcmac/Makefile
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# ##################################################################################################
# The MIT License (MIT)
# Copyright (c) 2025 Advanced Micro Devices, Inc. All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a copy of this software
# and associated documentation files (the "Software"), to deal in the Software without restriction,
# including without limitation the rights to use, copy, modify, merge, publish, distribute,
# sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is
# furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in all copies or
# substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT
# NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
# DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
# ##################################################################################################

HLS_BUILD_DIR_TRAFFIC_PRODUCER=build_traffic_producer.xcv80-lsva4737-2MHP-e-S
DESIGN_NAME=06_dcmac
HOME_DIR=$(shell realpath .)
BUILD_DIR=$(shell realpath ./build)
HLS_DIR=$(shell realpath ./hls)
V80PP_PATH=$(shell realpath ../../submodules/v80-vitis-flow)
VPP_DIR=$(BUILD_DIR)/v80-vitis-flow

.PHONY: all setup hls hw app clean

all: setup hls hw app

hw_all: setup hls hw app

setup:
mkdir -p $(BUILD_DIR)
cp -r $(V80PP_PATH) $(BUILD_DIR)

hls:
@echo "Running HLS step"
$(MAKE) -C $(HLS_DIR)

hw: setup hls
@echo "Running HW step"
cd $(VPP_DIR) && \
./scripts/v80++ --design-name $(DESIGN_NAME) --cfg $(HOME_DIR)/config.cfg --platform hw --segmented --kernels $(HLS_DIR)/$(HLS_BUILD_DIR_TRAFFIC_PRODUCER)/sol1 && \
cp build/$(DESIGN_NAME)_hw.vrtbin $(BUILD_DIR)

app: setup
@echo "Running user app build step"
mkdir -p $(BUILD_DIR) && cd $(BUILD_DIR) && \
cmake .. && \
make -j9
@echo "Setting LD_LIBRARY_PATH"
export LD_LIBRARY_PATH=$$(dirname $$(which vivado))/../lib/lnx64.o:$$LD_LIBRARY_PATH
@echo "Setting PATH"
export PATH=$$PATH:/usr/local/sbin

clean:
rm -rf $(BUILD_DIR)
make -C $(HLS_DIR) clean
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