MIPS Processor and Assembler

This is a single-cycle implementation of MIPS in verilog. The processor is capable of executing the following instructions:

To run an assembly program, you can use the assembler provided as assemble.py. Run it as follows:

python assemble.py <assembly_file> -o <output_file>
make run

The Instruction Memory, by default loads memfile.dat, so be sure to set output_file as memfile.dat or set the filename in imem.v.

Name		Name	Last commit message	Last commit date
Latest commit History 8 Commits
.gitignore		.gitignore
Makefile		Makefile
README.md		README.md
adder.v		adder.v
alu.v		alu.v
aludec.v		aludec.v
assemble.py		assemble.py
controlpath.v		controlpath.v
datapath.v		datapath.v
dmem.v		dmem.v
flopr.v		flopr.v
imem.v		imem.v
maindec.v		maindec.v
memfile.dat		memfile.dat
memfile.s		memfile.s
mips.v		mips.v
mips_tb.v		mips_tb.v
mux2.v		mux2.v
regfile.v		regfile.v
signExt.v		signExt.v
sl2.v		sl2.v
top.v		top.v

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