Intel® Agilex™ 7 PCIe Root Port System Example Design 25.1.1

Intel® Agilex™ 7 PCIe Root Port System Example Design 25.1.1

• Family: Intel® Agilex™ 7

• Quartus Version: 25.1.1

• Development Kit: [Agilex™ 7 FPGA M-Series Development Kit - HBM2e Edition (3x F-Tile & 1x R-Tile)]

• Device Part: AGMF039R47A1E2VR0

• Development Kit: [Agilex™ 7 FPGA I-Series Transceiver-SoC Development Kit (4x F-Tile)]

• Device Part: AGIB027R31B1E1VAA

• Development Kit: [Agilex™ 7 FPGA F-Series Transceiver-SoC Development Kit (P-Tiles & E-Tile)]

• Device Part: AGFB014R24B2E2V

24.3-1

Intel® Agilex™ 7 PCIe Root Port System Example Design 24.3-1

• Family: Intel® Agilex™ 7
• Quartus Version: 24.3
• Development Kit: Intel® Agilex™ 7 FPGA M-Series Development Kit - HBM2e Edition (3x F-Tile & 1x R-Tile)
• Device Part: AGMF039R47A1E2VR0

For more information, refer to the PCIe Root Port User Guide.

24.3-rc1

Intel® Agilex™ 7 PCIe Root Port System Example Design 24.3-rc1

• Family: Intel® Agilex™ 7
• Quartus Version: 24.3
• Development Kit: Intel® Agilex™ 7 FPGA M-Series Development Kit - HBM2e Edition (3x F-Tile & 1x R-Tile)
• Device Part: AGMF039R47A1E2VR0

For more information, refer to the PCIe Root Port User Guide.