ADSP-SC598 upstream driver changes v2

Documentation/devicetree/bindings/arm/analog/adi,sc5xx.yaml

@@ -0,0 +1,23 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/analog/adi,sc5xx.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Analog Devices SC59X 64-Bit ARM-based Processor Families
+
+maintainers:
+  - Arturs Artamonovs <arturs.artamonovs@analog.com>
+  - Utsav Agarwal <Utsav.Agarwal@analog.com>
+
+properties:
+  $nodename:
+    const: '/'
+  compatible:
+    description: SC59X 64-Bit Boards
+    items:
+      - enum:
+          - adi,sc598-som-ezkit                # Analog Devices SC598 EZKit
+      - const: adi,sc59x-64
+
+additionalProperties: true

Documentation/devicetree/bindings/clock/adi,sc5xx-clocks.yaml

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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/adi,sc5xx-clocks.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Clock Tree Drivers for Analog Devices ADSP-SC5XX Processors
+
+maintainers:
+  - Arturs Artamonovs <arturs.artamonovs@analog.com>
+  - Utsav Agarwal <Utsav.Agarwal@analog.com>
+
+description: |
+  These drivers read in the processors CDU (clock distribution unit)
+  and CGU (clock generation unit) values to determine various clock
+  rates
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+          - enum:
+              - adi,sc598-cgu0
+              - adi,sc598-cgu1
+              - adi,sc598-cdu
+              - adi,sc598-pll
+
+  '#clock-cells':
+    const: 1
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    description:
+      Specifies the CLKIN0 and CLKIN1 reference clock(s) from which the
+      output frequencies are derived via CDU+CGU
+    minItems: 2
+    maxItems: 2
+
+  clock-names:
+    description:
+      String reference names for CLKIN0 and CLKIN1
+    minItems: 2
+    maxItems: 2
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - '#clock-cells'
+  - clock-names
+
+additionalProperties: false
+
+examples:
+  - |
+    clock-controller@3108d000 {
+      compatible = "adi,sc598-cgu0";
+      reg = <0x3108d000 0x1000>;
+      #clock-cells = <1>;
+      clocks = <&sys_clkin0>, <&sys_clkin1>;
+      clock-names = "sys_clkin0", "sys_clkin1";
+    };

Documentation/devicetree/bindings/gpio/adi,sc5xx-gpio.yaml

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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpio/adi,sc5xx-gpio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Analog Devices GPIO Port Driver for SC5XX-family processors
+
+maintainers:
+  - Arturs Artamonovs <arturs.artamonovs@analog.com>
+  - Utsav Agarwal <Utsav.Agarwal@analog.com>
+
+description: |
+  Analog Devices GPIO Port Driver for SC5XX-family processors
+
+properties:
+  compatible:
+    enum:
+      - adi,sc5xx-gpio
+
+  gpio-controller: true
+
+  "#gpio-cells":
+    const: 2
+
+  gpio-ranges:
+    description: Associated pinmux controller and the GPIO range values
+
+  adi,pint:
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+    description: Associated pin interrupt controller driver
+    items:
+      - items:
+          - description: phandle to pin interrupt controller driver
+          - description: interrupt value
+
+  reg:
+    description: PORT GPIO control registers
+
+required:
+  - compatible
+  - reg
+  - "#gpio-cells"
+  - gpio-controller
+  - gpio-ranges
+
+additionalProperties: false
+
+examples:
+  - |
+    gpio@31004000 {
+      compatible = "adi,sc5xx-gpio";
+      gpio-controller;
+      #gpio-cells = <2>;
+      reg = <0x31004000 0x7f>;
+      gpio-ranges = <&pinctrl0 0 0 16>;
+    };

Documentation/devicetree/bindings/i2c/adi,sc5xx-i2c.yaml

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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/i2c/adi,sc5xx-i2c.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Analog Devices I2C Peripheral for SC5XX Processor Family
+
+maintainers:
+  - Arturs Artamonovs <arturs.artamonovs@analog.com>
+  - Utsav Agarwal <Utsav.Agarwal@analog.com>
+
+description: Analog Devices I2C Peripheral driver for SC5XX Processor Family
+
+properties:
+  compatible:
+    enum:
+      - adi,sc5xx-i2c
+
+  "#address-cells":
+    const: 1
+
+  "#size-cells":
+    const: 0
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clock-khz:
+    $ref: /schemas/types.yaml#/definitions/uint32
+
+  clocks:
+    maxItems: 1
+
+  clock-names:
+    maxItems: 1
+
+required:
+  - compatible
+  - "#address-cells"
+  - "#size-cells"
+  - reg
+  - interrupts
+  - clock-khz
+  - clocks
+  - clock-names
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+    #include <dt-bindings/clock/adi-sc5xx-clock.h>
+
+    i2c@31001400 {
+      #address-cells = <1>;
+      #size-cells = <0>;
+      compatible = "adi,sc5xx-i2c";
+      reg = <0x31001400 0xff>;
+      interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+      clock-khz = <100>;
+      clocks = <&clk ADSP_CLK_CGU0_SCLK0>;
+      clock-names = "sclk0";
+    };
+

Documentation/devicetree/bindings/pinctrl/adi,sc5xx-pinctrl.yaml

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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pinctrl/adi,sc5xx-pinctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Analog Devices Pinmuxing Control for SC5XX Processor Family
+
+maintainers:
+  - Arturs Artamonovs <arturs.artamonovs@analog.com>
+  - Utsav Agarwal <Utsav.Agarwal@analog.com>
+
+description: |
+  Pinmuxing Control Driver for Configuring Processor Pins/Pads
+
+properties:
+  compatible:
+    enum:
+      - adi,sc5xx-pinctrl
+  reg:
+    maxItems: 1
+
+  "#address-cells":
+    const: 1
+
+  "#size-cells":
+    const: 1
+
+  "adi,port-sizes":
+    $ref: /schemas/types.yaml#/definitions/uint32-array
+    maxItems: 9
+    description: Space delimited integer list denoting number of pins per port
+      Ports A-I exist, so this is up to 9 items long
+
+  "adi,no-drive-strength":
+    type: boolean
+    description: Indicate missing drive strength registers
+
+  "adi,no-pull-up-down":
+    type: boolean
+    description: Indicate missing pull up/down enable registers
+
+patternProperties:
+  '-pins$':
+    type: object
+    additionalProperties: false
+
+    properties:
+      pins:
+        type: object
+        description: |
+          A pinctrl node should contain a pin property, specifying the actual
+          pins to use.
+
+        properties:
+          pinmux:
+            $ref: /schemas/types.yaml#/definitions/uint32-array
+            description: |
+              pinmux is used to specify which of the available functionalities
+              for a given pin are actually used.
+
+        additionalProperties: false
+
+required:
+  - compatible
+  - reg
+  - "#address-cells"
+  - "#size-cells"
+  - adi,port-sizes
+
+additionalProperties: false
+
+examples:
+  - |
+    pinctrl@31004600 {
+      compatible = "adi,sc5xx-pinctrl";
+      #address-cells = <1>;
+      #size-cells = <1>;
+      reg = <0x31004600 0x400>;
+      adi,port-sizes = <16 16 16 16 16 16 16 16 7>;
+    };
+

Documentation/devicetree/bindings/reset/adi,sc5xx-reset.yaml

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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/reset/adi,sc5xx-reset.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Analog Devices Reset Controller for SC5XX processor family
+
+description: SHARC and ARM core reset control unit for starting/stopping/resetting
+  processors
+
+maintainers:
+  - Arturs Artamonovs <arturs.artamonovs@analog.com>
+  - Utsav Agarwal <Utsav.Agarwal@analog.com>
+
+properties:
+  compatible:
+    enum:
+      - adi,sc5xx-reset
+
+  reg:
+    maxItems: 1
+
+  "#reset-cells":
+    const: 0
+
+required:
+  - compatible
+  - reg
+  - "#reset-cells"
+
+additionalProperties: false
+
+examples:
+  - |
+    reset-controller@3108c000 {
+      compatible = "adi,sc5xx-reset";
+      reg = <0x3108c000 0x1000>;
+      #reset-cells = <0>;
+    };
+