This repository contains a collection of software and hardware implementations developed between 2011 and 2014, primarily in the context of the author’s bachelor’s thesis.
The focus of this work is resource-efficient image and video processing for embedded systems and small FPGA-based designs, with particular attention to low logic utilization, short data paths, and didactic transparency.
The repository is published for documentation, study, and reuse purposes. It represents an archival snapshot and is not actively maintained.
The repository includes the following components:
- JPEG-based video encoder (including spectral differencing)
- FIR filters for 2D image processing
- RGB ↔ HSI color space conversion
- Designs optimized for low FPGA resource usage
- C library for video and audio encoding
- C++ / Qt-based media player for the custom video/audio format
- Reference implementations and simulations in C and Java
- A step-by-step JPEG compression simulator
- Visualization of intermediate stages of image compression
- Implementations designed to make algorithmic concepts explicit
All algorithms were deliberately designed for fixed-point arithmetic rather than floating-point. Quantization parameters were chosen based on statistical analysis of intermediate data as well as subjective perceptual evaluation, balancing numerical efficiency with visual and auditory quality. This approach was essential to achieve resource-efficient implementations suitable for embedded and FPGA-based systems.
Where appropriate, look-up tables were used to approximate operations such as division. All hardware components were strongly parallelized, and particular care was taken to maximize achievable clock frequency, for example by keeping combinational paths short between sequential elements (e.g. FPGA flip-flops or equivalent memory structures).
- Most of the code was written between 2011 and 2012.
- At the time, the goal was to explore how classical image processing and compression algorithms could be implemented efficiently on constrained hardware.
- Some subprojects contain comments written in German. This reflects the original development context of the code (2011–2014). Variable names, interfaces, and identifiers are consistently English. The code is published in its original form for archival reasons.
- Some test images used during development are not included in this repository for licensing reasons.
- Parts of this work were presented in an academic context, including a conference talk.
- 🗃️ Archived
- ❌ No active development
- ❌ No maintenance or support
- ✔️ Provided as-is, for reference and educational use
This project is released under the BSD 2-Clause License.
You are free to use, modify, and redistribute the code, provided that proper
attribution is preserved. See the LICENSE file for details.
-------------------------------------------------------------------------------
Language files blank comment code
-------------------------------------------------------------------------------
VHDL 65 1754 2684 8143
C 33 1523 2392 6224
Java 24 513 377 2907
C/C++ Header 37 444 1425 1364
XML 2 22 0 1222
XML (Qt/GTK) 1 0 0 494
C++ 3 73 62 189
Markdown 2 26 0 70
Text 2 6 0 46
ProGuard 1 9 5 29
JSON 1 0 0 6
-------------------------------------------------------------------------------
SUM: 171 4370 6945 20694
-------------------------------------------------------------------------------
Andreas Schwenk
(2011–2014)