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Fully implement DSU features (Including for D21/D11)#998

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rnd-ash wants to merge 15 commits intoatsamd-rs:masterfrom
rnd-ash:dsu-improvements
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Fully implement DSU features (Including for D21/D11)#998
rnd-ash wants to merge 15 commits intoatsamd-rs:masterfrom
rnd-ash:dsu-improvements

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@rnd-ash
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@rnd-ash rnd-ash commented Mar 10, 2026

Summary

This PR adds the DSU Peripheral implementation to the D21 and D11 series of chips, and adds the following methods for all chip families:

  1. Free method (To release the DSU peripheral)
  2. is_debugger_present function to check the presence of a debugger
  3. memory_test function to run the MBIST test (Marked as unsafe due to it overwriting RAM)
  4. Background memory test functionality (See below)

Background memory testing

Using the PollingMemoryTest structure, and Dsu::polling_memory_test, its now possible to run a memory test in the background when the CPU is asleep, and abort the memory test, if it isn't completed yet, when the CPU wakes up.

I've added an example to the PollingMemoryTest documentation on how this can be used to check RAM in the background on an RTIC application, in the same way this is done on ECUs.

Additional notes

The CRC32 algorithm has also been updated for the D21 specifically for an errata note when calculating in RAM space on silicon revisions A-D

@sajattack
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I suppose this supercedes #925 ?

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rnd-ash commented Mar 20, 2026

I guess so.....but, I completely forgot about @kyp44 PR for the DSU. I can update mine so we have clock V2 for D5x as well

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rnd-ash commented Mar 20, 2026

@sajattack I updated my code based on the PR @kyp44 did, so we now have Clock V2 for the d5x implementation of the DSU

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rnd-ash commented Mar 21, 2026

Alright, got everything to build OK - Had to migrate 1 Example for featherm4 to clock V2 API

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This isn't a super in-depth review yet, but I had some observations that I wanted to write down as I glanced over the PR

Comment on lines +314 to +323
/// **CAUTION** This can overwrite critical data in RAM, use
/// with caution
///
/// This is useful for background memory check tasks when the
/// CPU is at idle, as the test can be aborted immediately
/// using the handle once the CPU receives an incomming
/// interrupt.
///
/// This should always be ran inside a critical-section
/// to avoid the CPU context-switching mid memory test.
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The **CAUTION** comment and critical section mention should go in a # SAFETY section instead

///
/// **CAUTION** This can overwrite critical data in RAM, use
/// with caution
///
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Should go in a # SAFETY section, along with a warning about running in a critical section


#[hal_cfg("dsu-d21")]
{
// Errita for D21 silicon versions A-D
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Errita -> Errata

Comment on lines +452 to +454
pub fn is_completed(&self) -> bool {
self.dsu.is_done()
}
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Suggestion: use nb's primitives instead, so that users may use nb::block!. This way the blocking memory_test method can also use it and avoid code duplication

Comment on lines +103 to +113
/// Releases the DSU peripheral
#[hal_cfg(any("dsu-d21", "dsu-d11"))]
pub fn free(self) -> pac::Dsu {
self.dsu
}

/// Releases the DSU peripheral
#[hal_cfg(any("dsu-d5x"))]
pub fn free(self) -> (pac::Dsu, DsuAhbClk, DsuApbClk) {
(self.dsu, self.ahb, self.apb)
}
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Based on the conclusions we come to in #1000, do we need to swreset and/or stop mclk? Same for new is a swreset necessary?

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jbeaurivage commented Mar 23, 2026

If this is merged, will it also close #925?

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3 participants