iut: Add test case to test SEDI dma between SRAM and IMR #70
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Pull Request Overview
This PR adds a new test case to verify SEDI DMA functionality for data transfer between SRAM and IMR (Intel Memory Region) memory areas.
- Implements DMA transfer functions for copying data between SRAM and IMR regions
- Adds comprehensive test cases including stress testing with variable data lengths
- Integrates the new test into the CMake build system with proper conditional compilation
Reviewed Changes
Copilot reviewed 2 out of 2 changed files in this pull request and generated 3 comments.
| File | Description |
|---|---|
| test_sedi_dma.c | New test implementation for SEDI DMA functionality between SRAM and IMR |
| CMakeLists.txt | Adds conditional compilation of the new DMA test based on CONFIG_DMA_SEDI |
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Pull Request Overview
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kwd-doodling
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usage: iut run sedi_dma_imr [mode] [len] Add a stress test with increased DMA length. Signed-off-by: Dong Wang <dong.d.wang@intel.com>
They're temperarily disabled in Zephyr dts files for ISH. Get them enabled in IUT to make sure their build is not broken by new patches. Signed-off-by: Dong Wang <dong.d.wang@intel.com>
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