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This PR added an mh_sha1 assembly implementation with vector extension for riscv64.

Origin C implementation:

mh_sha1_update_base_warm: runtime =     247264 usecs, bandwidth 31 MB in 0.2473 sec = 132.52 MB/s
isal_mh_sha1_update_warm: runtime =    2464763 usecs, bandwidth 312 MB in 2.4648 sec = 132.95 MB/s

Assembly implementation with vector extension :

mh_sha1_update_base_warm: runtime =     213991 usecs, bandwidth 31 MB in 0.2140 sec = 153.13 MB/s
isal_mh_sha1_update_warm: runtime =     863086 usecs, bandwidth 312 MB in 0.8631 sec = 379.66 MB/s

@pablodelara
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This will be merged after the new release is out next month, thanks

@HeliC829 HeliC829 force-pushed the risc-v-mh-sha1 branch 2 times, most recently from 75d56f6 to afff675 Compare January 1, 2026 12:03
… for riscv64

Signed-off-by: Julian Zhu <julian.oerv@isrc.iscas.ac.cn>
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2 participants