risc64: Add description for arch registers #1958
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It'd be a lot easier to understand the assembly code by having description table for architecture registers. This patch adds the register table to mcount.S for RISC-V[1]. References: [1] https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/v1.0/riscv-cc.adoc#integer-register-convention Co-authored-by: Yunseong Kim <yskelg@gmail.com> Co-authored-by: Choi Wonsick <king258436@naver.com> Signed-off-by: Hyeeun Lee <blackhaze1024@gmail.com>
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It'd be a lot easier to understand the assembly code by having description table for architecture registers.
This patch adds the register table to mcount.S for RISC-V[1].
References:
[1] https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/v1.0/riscv-cc.adoc#integer-register-convention