Mspi dw async dma #3435
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Mspi dw async dma #3435
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Hi-Im-David
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anangl
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rob-robinson-14
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manifest PR: nrfconnect/sdk-nrf#25373 |
The nrf-qspi-v2 peripheral is similar to EXMIF on nrf54h20 but supports DMA and slave-mode. The wrapper around the SSI IP is also different with DMA features. Signed-off-by: David Jewsbury <david.jewsbury@nordicsemi.no> (cherry picked from commit 72dd539)
Support for new MSPI peripheral where there is no PSEL so pins are setup through CTRLSEL. Signed-off-by: David Jewsbury <david.jewsbury@nordicsemi.no> (cherry picked from commit ac94ca7)
This is a new callback option that drivers can use for when a request or xfer has timed out. E.g if an Async RX request never received anything, this callback can be used so a user can clean up their application. Signed-off-by: David Jewsbury <david.jewsbury@nordicsemi.no> (cherry picked from commit a322957)
enum mspi_op_mode in mspi.h has different syntax to this binding. Aligning these will allow for cleaner code in the implmented drivers. Signed-off-by: David Jewsbury <david.jewsbury@nordicsemi.no> (cherry picked from commit 032ca4c)
Handling of asynchronous transfers uses the system workqueue, hence they are not available when multithreading is disabled. Also add missing dependency on multithreading in the MSPI_DW_HANDLE_FIFOS_IN_SYSTEM_WORKQUEUE Kconfig option. Signed-off-by: David Jewsbury <david.jewsbury@nordicsemi.no> Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no> (cherry picked from commit 2f1ee73)
MSPI slave mode is selected through devicetree using the op-mode property. Mode selected by SSIISMST bit in the CTRLR0 register. EXMIF can only be Master (controller). Signed-off-by: David Jewsbury <david.jewsbury@nordicsemi.no> (cherry picked from commit a18fd95)
Initial DMA support. DMA supports implementation of SSI IP but using vendor specific DMA in the wrapper. The setup of the DMA is done in mspi_dw_vendor_specific.h. Signed-off-by: David Jewsbury <david.jewsbury@nordicsemi.no> (cherry picked from commit d9677bb)
There is a scenario where a Bus fault occurs as the power management isn't initialised yet and the core is attempted to be turned off via the ssienr register. This commit edits this so the core register is written to after the initialisation of the power management. Signed-off-by: David Jewsbury <david.jewsbury@nordicsemi.no> (cherry picked from commit 4bf6a756280be4d90edf96f1a4c088c4620be41d)
Dual data rate isn't always supported so this config enables/disables the relevant code in the driver. Signed-off-by: David Jewsbury <david.jewsbury@nordicsemi.no> (cherry picked from commit 55af2824dc9ab25100f625c24d84cdbc489ecef4)
Hi-Im-David
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Support for async and DMA transactions for mspi_dw driver as well as initial support for qspi_v2 driver from these PRs:
zephyrproject-rtos/zephyr#94469
zephyrproject-rtos/zephyr#98152