GitHub - red-cormorant/Not-so-simple-ALU: ALU module which receives input as headers and payloads from memory or direct operands and decodes them in order to use for arithmetic, bit-wise and shift operations. After this steps, this module returns output using same protocol.

Branches Tags

Name		Name	Last commit message	Last commit date
Latest commit History 5 Commits
_xmsgs		_xmsgs
alt test		alt test
build		build
iseconfig		iseconfig
isim/alu_test_isim_beh.exe.sim		isim/alu_test_isim_beh.exe.sim
tester		tester
tests/base		tests/base
xst/work		xst/work
README		README
README.pdf		README.pdf
alu.cmd_log		alu.cmd_log
alu.gise		alu.gise
alu.prj		alu.prj
alu.spl		alu.spl
alu.stx		alu.stx
alu.sym		alu.sym
alu.v		alu.v
alu.xise		alu.xise
alu.xst		alu.xst
alu.zip		alu.zip
alu_beh.prj		alu_beh.prj
alu_isim_beh.exe		alu_isim_beh.exe
alu_isim_beh1.wdb		alu_isim_beh1.wdb
alu_regfile.v		alu_regfile.v
alu_test.cmd_log		alu_test.cmd_log
alu_test.lso		alu_test.lso
alu_test.prj		alu_test.prj
alu_test.syr		alu_test.syr
alu_test.v		alu_test.v
alu_test.xst		alu_test.xst
alu_test_beh.prj		alu_test_beh.prj
alu_test_envsettings.html		alu_test_envsettings.html
alu_test_isim_beh.exe		alu_test_isim_beh.exe
alu_test_isim_beh.wdb		alu_test_isim_beh.wdb
alu_test_isim_beh1.wdb		alu_test_isim_beh1.wdb
alu_test_summary.html		alu_test_summary.html
alu_test_xst.xrpt		alu_test_xst.xrpt
alu_top.v		alu_top.v
alu_top_isim_beh.exe		alu_top_isim_beh.exe
alu_w.v		alu_w.v
copie.txt		copie.txt
expected.out		expected.out
fuse.log		fuse.log
fuse.xmsgs		fuse.xmsgs
fuseRelaunch.cmd		fuseRelaunch.cmd
hehe.wcfg		hehe.wcfg
instructions.out		instructions.out
isim.cmd		isim.cmd
isim.log		isim.log
results.txt		results.txt
sergiu.wcfg		sergiu.wcfg
start_test.bat		start_test.bat
webtalk_pn.xml		webtalk_pn.xml
xilinxsim.ini		xilinxsim.ini

Repository files navigation


Setup:
-modify the path in line 5, "call C:\Xilinx\14.7\ISE_DS\settings32.bat", from start_test.bat to correspond with your Xilinx installation (use "settings64.bat" if you are running the 64bit version); if you followed the Xilinx install tutorial, the default path should work.
-you can change the parameters at the start of the testing module in "tester/tester.v" to see more/less debug output.

Running:
-copy your Verilog files in the root of the folder (alu_top.v, alu_regfile.v, alu.v)
-run (double-click) start_test.bat; results will be in "results.txt" and execution log will be in "results.log"
-you can enable the simulator GUI by changing "nogui" to "gui" in line 8 of start_test.bat
-you can run selected tests by removing unwanted ones from the "tests" folder

About

ALU module which receives input as headers and payloads from memory or direct operands and decodes them in order to use for arithmetic, bit-wise and shift operations. After this steps, this module returns output using same protocol.

verilog

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