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Original file line number Diff line number Diff line change
Expand Up @@ -372,6 +372,15 @@ export const Trace_doInitialSchematicTraceRender = (trace: Trace) => {
// push them out of the way
pushEdgesOfSchematicTraceToPreventOverlap({ edges, db, source_trace_id })

// Find all the intersections between myEdges and edges connected to the
// same net and create junction points
// Calculate junctions where traces of the same net intersect
junctions = createSchematicTraceJunctions({
edges,
db,
source_trace_id: trace.source_trace_id!,
})

// Find all intersections between myEdges and all otherEdges and create a
// segment representing the crossing. Wherever there's a crossing, we create
// 3 new edges. The middle edge has `is_crossing: true` and is 0.01mm wide
Expand All @@ -380,15 +389,10 @@ export const Trace_doInitialSchematicTraceRender = (trace: Trace) => {
source_trace_id,
differentNetOnly: true,
}).flatMap((t: SchematicTrace) => t.edges)
edges = createSchematicTraceCrossingSegments({ edges, otherEdges })

// Find all the intersections between myEdges and edges connected to the
// same net and create junction points
// Calculate junctions where traces of the same net intersect
junctions = createSchematicTraceJunctions({
edges = createSchematicTraceCrossingSegments({
edges,
db,
source_trace_id: trace.source_trace_id!,
otherEdges,
junctions,
})
}

Expand Down
Original file line number Diff line number Diff line change
@@ -1,7 +1,5 @@
import { distance, doesLineIntersectLine } from "@tscircuit/math-utils"
import type { CircuitJsonUtilObjects } from "@tscircuit/circuit-json-util"
import type { SchematicTrace } from "circuit-json"
import { getOtherSchematicTraces } from "./get-other-schematic-traces"
import { getUnitVectorFromPointAToB } from "@tscircuit/math-utils"

/**
Expand All @@ -12,9 +10,11 @@ import { getUnitVectorFromPointAToB } from "@tscircuit/math-utils"
export const createSchematicTraceCrossingSegments = ({
edges: inputEdges,
otherEdges,
junctions,
}: {
edges: SchematicTrace["edges"]
otherEdges: SchematicTrace["edges"]
junctions?: Array<{ x: number; y: number }>
}) => {
const edges = [...inputEdges]
// For each edge in our trace
Expand Down Expand Up @@ -72,6 +72,12 @@ export const createSchematicTraceCrossingSegments = ({

const crossingPoint = { x: intersectX, y: intersectY }

// Skip creating a crossing segment if there's a junction at this point
const isJunction = junctions?.some(
(j) => distance(j, crossingPoint) < 0.01,
)
if (isJunction) continue

otherEdgesIntersections.push({
otherEdge,
crossingPoint: crossingPoint,
Expand Down
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73 changes: 73 additions & 0 deletions tests/repros/repro51-junction-hopover-overlap.test.tsx
Original file line number Diff line number Diff line change
@@ -0,0 +1,73 @@
import { test, expect } from "bun:test"
import { getTestFixture } from "../fixtures/get-test-fixture"

test("repro51: junction and hop over traces should not overlap", () => {
const { circuit } = getTestFixture()

circuit.add(
<board pcbPack>
{/* --- 555 timer as a generic 8‑pin chip --- */}
<chip
name="U1"
footprint="soic8"
pinLabels={{
pin1: "GND",
pin2: "TRIG",
pin3: "OUT",
pin4: "RESET",
pin5: "CTRL",
pin6: "THRES",
pin7: "DISCH",
pin8: "VCC",
}}
schPinArrangement={{
leftSide: {
direction: "top-to-bottom",
pins: ["RESET", "CTRL", "THRES", "TRIG"],
},
rightSide: {
direction: "top-to-bottom",
pins: ["VCC", "OUT", "DISCH", "GND"],
},
}}
/>
{/* VCC -> DISCH */}
<resistor name="R2" resistance="10k" footprint="0805" />{" "}
{/* DISCH -> node */}
<capacitor name="C1" capacitance="10uF" footprint="1206" />{" "}
{/* node -> GND */}
<capacitor name="C2" capacitance="10nF" footprint="0805" />{" "}
{/* CTRL -> GND (stability) */}
{/* 3-pin header for power + output */}
<pinheader
name="J1"
pinCount={3}
footprint="pinrow3"
gender="male"
schFacingDirection="left"
pinLabels={{ pin1: "VCC", pin2: "OUT", pin3: "GND" }}
connections={{ VCC: "net.VCC", OUT: "net.OUT", GND: "net.GND" }}
/>
{/* Power & housekeeping */}
<trace from="U1.VCC" to="net.VCC" />
<trace from="U1.GND" to="net.GND" />
<trace from="U1.RESET" to="net.VCC" />
<trace from="U1.CTRL" to="C2.pin1" />
<trace from="C2.pin2" to="net.GND" />
{/* Astable wiring: tie THRES & TRIG; R1, R2, C1 form RC network */}
<trace from="U1.THRES" to="net.NODE" />
<trace from="U1.TRIG" to="net.NODE" />
<trace from="R2.pin2" to="net.NODE" />
<trace from="C1.pin1" to="net.NODE" />
<trace from="C1.pin2" to="net.GND" />
{/* R1 from VCC to DISCH; R2 from DISCH to node */}
<trace from="U1.DISCH" to="R2.pin1" />
{/* Output to header */}
<trace from="U1.OUT" to="net.OUT" />
</board>,
)

circuit.render()

expect(circuit).toMatchSchematicSnapshot(import.meta.path)
})