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* machine/attiny85: add PWM support for Timer0 and Timer1 Add complete PWM implementation for ATtiny85, supporting both Timer0 and Timer1 with their respective output channels: - Timer0: 8-bit timer for pins PB0 (OC0A) and PB1 (OC0B) - Timer1: 8-bit high-speed timer for pins PB1 (OC1A) and PB4 (OC1B) Timer1 provides more flexible period control with configurable top value (OCR1C) and extended prescaler options (1-16384), making it well-suited for LED PWM control and other applications requiring variable frequencies. Implements full PWM interface including Configure, SetPeriod, Channel, Set, SetInverting, Top, Counter, and Period methods. Co-Authored-By: Claude Sonnet 4.5 <noreply@anthropic.com> * machine/digispark: document PWM support on pins Add documentation to the Digispark board file indicating which pins support PWM output: - P0 (PB0): Timer0 channel A - P1 (PB1): Timer0 channel B or Timer1 channel A - P4 (PB4): Timer1 channel B Includes package comment explaining Timer0 vs Timer1 capabilities, with Timer1 recommended for more flexible frequency control. Co-Authored-By: Claude Sonnet 4.5 <noreply@anthropic.com> * machine/attiny85: optimize PWM prescaler lookups Replace verbose switch statements with more efficient implementations: - SetPeriod: Use bit shift (top >>= prescaler-1) instead of 15-case switch for dividing uint64 by power-of-2 prescaler values - Period: Replace switch statements with compact uint16 lookup tables for both Timer0 and Timer1, casting to uint64 only when needed This addresses review feedback about inefficient switch-based lookups. On AVR, this approach is significantly smaller: - Bit shifts for uint64 division: ~34 bytes vs ~140 bytes - uint16 tables: 22 bytes code + 32/16 bytes data vs ~140 bytes - Total savings: ~190 bytes (68% reduction) Co-Authored-By: Claude Sonnet 4.5 <noreply@anthropic.com> * examples/pwm: add digispark support and smoketest Add digispark.go configuration for PWM example using Timer1 with pins P1 (LED) and P4. Also add digispark PWM example to GNUmakefile smoketests. Co-Authored-By: Claude Sonnet 4.5 <noreply@anthropic.com> --------- Co-authored-by: Claude Sonnet 4.5 <noreply@anthropic.com>
…ons for all peripheral reset/unreset operations Signed-off-by: deadprogram <ron@hybridgroup.com>
…em resources/power usage Signed-off-by: deadprogram <ron@hybridgroup.com>
This simplifies the process of constructing and encoding layout bitmaps. Instead of creating big integers and merging them, we can create a pre-sized bitmap and set positions within it. This also changes the encoding logic to allow larger layouts to be encoded inline. We would previously not encode a layout inline unless the size was less than the width of the data field. This is overly conservative. A layout can be encoded inline as long as: 1. The size fits within the size field. 2. All set bits in the bitmap fit into the data field.
Signed-off-by: deadprogram <ron@hybridgroup.com>
* testdata: more corpus entries * testdata: remove skipwasi for dchest/siphash build issues
* machine/attiny85: add USI-based SPI support Implement SPI communication for ATTiny85 using the USI (Universal Serial Interface) hardware in three-wire mode. The ATTiny85 lacks dedicated SPI hardware but can emulate SPI using the USI module with software clock strobing. Implementation details: - Configure USI in three-wire mode for SPI operation - Use clock strobing technique to shift data in/out - Pin mapping: PB2 (SCK), PB1 (MOSI/DO), PB0 (MISO/DI) - Support both Transfer() and Tx() methods The implementation uses the USI control register (USICR) to toggle the clock pin, which triggers automatic bit shifting in hardware. This is more efficient than pure software bit-banging. Current limitations: - Frequency configuration not yet implemented (runs at max software speed) - Only SPI Mode 0 (CPOL=0, CPHA=0) supported - Only MSB-first bit order supported Co-Authored-By: Claude Sonnet 4.5 <noreply@anthropic.com> Co-authored-by: Ona <no-reply@ona.com> * machine/attiny85: add SPI frequency configuration support Add software-based frequency control for USI SPI. The ATtiny85 USI lacks hardware prescalers, so frequency is controlled via delay loops between clock toggles. - Calculate delay cycles based on requested frequency and CPU clock - Fast path (no delay) when frequency is 0 or max speed requested - Delay loop uses nop instructions for timing control Co-authored-by: Ona <no-reply@ona.com> * machine/attiny85: add SPI mode configuration support Add support for all 4 SPI modes (Mode 0-3) using USI hardware: - Mode 0 (CPOL=0, CPHA=0): Clock idle low, sample on rising edge - Mode 1 (CPOL=0, CPHA=1): Clock idle low, sample on falling edge - Mode 2 (CPOL=1, CPHA=0): Clock idle high, sample on falling edge - Mode 3 (CPOL=1, CPHA=1): Clock idle high, sample on rising edge CPOL is controlled by setting the clock pin idle state. CPHA is controlled via the USICS0 bit in USICR. Co-authored-by: Ona <no-reply@ona.com> * machine/attiny85: add LSB-first bit order support Add software-based LSB-first support for USI SPI. The USI hardware only supports MSB-first, so bit reversal is done in software before sending and after receiving. Uses an efficient parallel bit swap algorithm (3 operations) to reverse the byte. Co-authored-by: Ona <no-reply@ona.com> * GNUmakefile: add mcp3008 SPI example to digispark smoketest Test the USI-based SPI implementation for ATtiny85/digispark. Co-authored-by: Ona <no-reply@ona.com> * machine/attiny85: minimize SPI RAM footprint Reduce SPI struct from ~14 bytes to 1 byte to fit in ATtiny85's limited 512 bytes of RAM. Changes: - Remove register pointers (use avr.USIDR/USISR/USICR directly) - Remove pin fields (USI pins are fixed: PB0/PB1/PB2) - Remove CS pin management (user must handle CS) - Remove frequency control (runs at max speed) - Remove LSBFirst support The SPI struct now only stores the USICR configuration byte. Co-authored-by: Ona <no-reply@ona.com> * Revert "machine/attiny85: minimize SPI RAM footprint" This reverts commit 387ccad. Co-authored-by: Ona <no-reply@ona.com> * machine/attiny85: reduce SPI RAM usage by 10 bytes Remove unnecessary fields from SPI struct while keeping all functionality: - Remove register pointers (use avr.USIDR/USISR/USICR directly) - Remove pin fields (USI pins are fixed: PB0/PB1/PB2) - Remove CS pin (user must manage it, standard practice) Kept functional fields: - delayCycles for frequency control - usicrValue for SPI mode support - lsbFirst for bit order support SPI struct reduced from 14 bytes to 4 bytes. Co-authored-by: Ona <no-reply@ona.com> --------- Co-authored-by: Ona <no-reply@ona.com>
* feat: Add Vicharak Shrike Lite * Add shrike-lite to smoketest
* Add per-byte timeout budget for rp2 I2C * run goimports
Signed-off-by: deadprogram <ron@hybridgroup.com>
Bump the GitHub Actions Nix install as well; nixpkgs 25.11 requires a newer nix command.
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Size difference with the dev branch: Binary size differencenot the same command!
tinygo build -size short -o ./build/test.hex -target=feather-rp2040 ./examples/adafruit4650
go: downloading tinygo.org/x/tinyfont v0.3.0
not the same command!
tinygo build -size short -o ./build/test.hex -target=pico ./examples/tmc5160/main.go
go: downloading golang.org/x/exp v0.0.0-20241204233417-43b7b7cde48d
not the same command!
tinygo build -size short -o ./build/test.hex -target=nano-rp2040 -stack-size 8kb ./examples/net/websocket/dial/
go: downloading golang.org/x/net v0.33.0
not the same command!
tinygo build -size short -o ./build/test.hex -target=nano-rp2040 -stack-size 8kb ./examples/net/mqttclient/natiu/
go: downloading github.com/soypat/natiu-mqtt v0.5.1
not the same command!
tinygo build -size short -o ./build/test.hex -target=wioterminal -stack-size 8kb ./examples/net/mqttclient/paho/
go: downloading github.com/eclipse/paho.mqtt.golang v1.2.0
flash ram
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73760 73760 0 0.00% 11092 11092 0 0.00% tinygo build -size short -o ./build/test.hex -target=feather-m4 ./examples/sdcard/console/
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10160 10160 0 0.00% 7128 7128 0 0.00% tinygo build -size short -o ./build/test.elf -target=wioterminal ./examples/axp192/m5stack-core2-blinky/
9020 9020 0 0.00% 5680 5680 0 0.00% tinygo build -size short -o ./build/test.uf2 -target=pico ./examples/xpt2046/main.go
13068 13068 0 0.00% 4920 4920 0 0.00% tinygo build -size short -o ./build/test.hex -target=nucleo-wl55jc ./examples/sx126x/lora_rxtx/
31772 31772 0 0.00% 7200 7200 0 0.00% tinygo build -size short -o ./build/test.uf2 -target=pico ./examples/ssd1289/main.go
11300 11300 0 0.00% 6656 6656 0 0.00% tinygo build -size short -o ./build/test.hex -target=pico ./examples/irremote/main.go
12292 12292 0 0.00% 5756 5756 0 0.00% tinygo build -size short -o ./build/test.hex -target=badger2040 ./examples/uc8151/main.go
10516 10516 0 0.00% 5752 5752 0 0.00% tinygo build -size short -o ./build/test.uf2 -target=pico ./examples/scd4x/main.go
7984 7984 0 0.00% 5088 5088 0 0.00% tinygo build -size short -o ./build/test.uf2 -target=circuitplay-express ./examples/makeybutton/main.go
9448 9448 0 0.00% 5104 5104 0 0.00% tinygo build -size short -o ./build/test.hex -target=arduino-nano33 ./examples/ds18b20/main.go
122064 122064 0 0.00% 8108 8108 0 0.00% tinygo build -size short -o ./build/test.hex -target=nucleo-wl55jc ./examples/lora/lorawan/atcmd/
16104 16104 0 0.00% 7348 7348 0 0.00% tinygo build -size short -o ./build/test.uf2 -target=pico ./examples/as560x/main.go
9912 9912 0 0.00% 5700 5700 0 0.00% tinygo build -size short -o ./build/test.uf2 -target=pico ./examples/mpu6886/main.go
7764 7764 0 0.00% 5080 5080 0 0.00% tinygo build -size short -o ./build/test.hex -target=arduino-nano33 ./examples/ttp229/main.go
67344 67344 0 0.00% 7212 7212 0 0.00% tinygo build -size short -o ./build/test.hex -target=pico ./examples/ndir/main_ndir.go
62124 62124 0 0.00% 3768 3768 0 0.00% tinygo build -size short -o ./build/test.hex -target=microbit ./examples/ndir/main_ndir.go
65468 65468 0 0.00% 6600 6600 0 0.00% tinygo build -size short -o ./build/test.hex -target=arduino-nano33 ./examples/ndir/main_ndir.go
9364 9364 0 0.00% 5692 5692 0 0.00% tinygo build -size short -o ./build/test.uf2 -target=pico ./examples/mpu9150/main.go
11572 11572 0 0.00% 5728 5728 0 0.00% tinygo build -size short -o ./build/test.hex -target=macropad-rp2040 ./examples/sh1106/macropad_spi
8508 8508 0 0.00% 6156 6156 0 0.00% tinygo build -size short -o ./build/test.hex -target=macropad-rp2040 ./examples/encoders/quadrature-interrupt
66840 66840 0 0.00% 7180 7180 0 0.00% tinygo build -size short -o ./build/test.uf2 -target=pico ./examples/mcp9808/main.go
42124 42124 0 0.00% 7536 7536 0 0.00% tinygo build -size short -o ./build/test.uf2 -target=pico ./examples/tmc2209/main.go
13224 13224 0 0.00% 5688 5688 0 0.00% tinygo build -size short -o ./build/test.hex -target=pico ./examples/tmc5160/main.go
12004 12004 0 0.00% 4900 4900 0 0.00% tinygo build -size short -o ./build/test.uf2 -target=nicenano ./examples/sharpmem/main.go
62424 62424 0 0.00% 6332 6332 0 0.00% tinygo build -size short -o ./build/test.hex -target=feather-nrf52840 ./examples/max6675/main.go
12856 12856 0 0.00% 5748 5748 0 0.00% tinygo build -size short -o ./build/test.hex -target=pico ./examples/ens160/main.go
22956 22956 0 0.00% 5772 5772 0 0.00% tinygo build -size short -o ./build/test.hex -target=pico ./examples/si5351/main.go
27992 27992 0 0.00% 7100 7100 0 0.00% tinygo build -size short -o ./build/test.hex -target=pico ./examples/w5500/main.go
86268 86268 0 0.00% 7532 7532 0 0.00% tinygo build -size short -o ./build/test.hex -target=challenger-rp2040 ./examples/net/ntpclient/
347208 347208 0 0.00% 17164 17164 0 0.00% tinygo build -size short -o ./build/test.hex -target=pyportal -stack-size 8kb ./examples/net/http-get/
119920 119920 0 0.00% 8428 8428 0 0.00% tinygo build -size short -o ./build/test.hex -target=arduino-nano33 -stack-size 8kb ./examples/net/tcpclient/
306628 306628 0 0.00% 16216 16216 0 0.00% tinygo build -size short -o ./build/test.hex -target=nano-rp2040 -stack-size 8kb ./examples/net/websocket/dial/
103332 103332 0 0.00% 10408 10408 0 0.00% tinygo build -size short -o ./build/test.hex -target=metro-m4-airlift -stack-size 8kb ./examples/net/socket/
388384 388384 0 0.00% 19180 19180 0 0.00% tinygo build -size short -o ./build/test.hex -target=matrixportal-m4 -stack-size 8kb ./examples/net/webstatic/
166356 166356 0 0.00% 10400 10400 0 0.00% tinygo build -size short -o ./build/test.hex -target=arduino-mkrwifi1010 -stack-size 8kb ./examples/net/tlsclient/
153756 153756 0 0.00% 9168 9168 0 0.00% tinygo build -size short -o ./build/test.hex -target=nano-rp2040 -stack-size 8kb ./examples/net/mqttclient/natiu/
116588 116588 0 0.00% 13704 13704 0 0.00% tinygo build -size short -o ./build/test.hex -target=wioterminal -stack-size 8kb ./examples/net/webclient/
338244 338244 0 0.00% 22264 22264 0 0.00% tinygo build -size short -o ./build/test.hex -target=wioterminal -stack-size 8kb ./examples/net/webserver/
338476 338476 0 0.00% 22148 22148 0 0.00% tinygo build -size short -o ./build/test.hex -target=wioterminal -stack-size 8kb ./examples/net/mqttclient/paho/
172592 172592 0 0.00% 14168 14168 0 0.00% tinygo build -size short -o ./build/test.hex -target=elecrow-rp2040 -stack-size 8kb ./examples/net/tlsclient/
118092 118092 0 0.00% 12192 12192 0 0.00% tinygo build -size short -o ./build/test.hex -target=elecrow-rp2350 -stack-size 8kb ./examples/net/ntpclient/
6266854 6266854 0 0.00% 1025044 1025044 0 0.00%
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Any chance to get it merged soon? |
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Signed-off-by: deadprogram <ron@hybridgroup.com>
We use this a bunch. Upstream switched to `internal/strconv` which is much heavier.
Signed-off-by: deadprogram <ron@hybridgroup.com>
* esp32s3 spi * stabilization freq cpu * cheange clacl freq for spi * fix linters * esp32s3-spi: change default pins for esp32s3 xiao * set default configuration * esp32s3-spi: extends smoketests for esp32s3
This changes the order for initialization of the random number seed generation on wasm platforms until after the heap has been initialized. Should fix #5198 Signed-off-by: deadprogram <ron@hybridgroup.com>
Signed-off-by: deadprogram <ron@hybridgroup.com>
Signed-off-by: deadprogram <ron@hybridgroup.com>
…clash with stm32 device name Previously, there was no specific stm32f4r5.svd in lib/stm32-svd, just stm32f4x5.svd was used; now, both files are present. This means that the existing build-tag stm32f4r5 will include the device/stm32/stm32f4r5.go file, and the additional build-tag stm32f4x5 would include the device/stm32/stm32f4x5.go file as well, resulting in build conflicts. Renaming just the tag, which is used in src/machine, and src/runtime, into stm32f4y5 solves this issue.
USART.ISR_FIFO_ENABLED => USART.ISR
IRQ_TIM6_DAC => IRQ_TIM6_DAC_LPTIM1
ADC.CHSELR => ADC.CHSELR0 (alternate registers 0/1)
Recent changes in stm32-svd result in a change from previous 16-bit register access to 32-bit access. Both access types are allowed, according to the register manuals.
Signed-off-by: deadprogram <ron@hybridgroup.com>
This adds usage of the new espflash package to perform flashing on ESP32, ESP32S3, ESP32C3, & ESP8266 boards. This means that you no longer have to install esptool.py in order to flash ESP32 based boards. Signed-off-by: deadprogram <ron@hybridgroup.com>
…lt-in esp32flash Signed-off-by: deadprogram <ron@hybridgroup.com>
Signed-off-by: deadprogram <ron@hybridgroup.com>
…om number generator. Signed-off-by: deadprogram <ron@hybridgroup.com>
* save * esp32s3: save * adc * worker on esp32s3 * worker after flash arduino * save * fix * simple adc * added adc * esp32s3-adc: rm debug * esp32s3-adc: clear * last refactor * linters * esp32s3-adc: recover example * esp32s3-adc: reuse fuse for esp32c3 * esp32s3-adc: refactor bugs * esp32s3-adc: fix adc2 for esp32c3 * esp32s3-adc: group to adc files * esp32s3-adc: revert changing board * esp32s3-adc: recover example adc * esp32s3-adc: fix edge values adc & added smoketests * esp32s3-adc: rename methods * esp32s3-adc: extends adc tests * esp32s3-adc: drop debug * esp32s3-adc: added ADCX const * esp32s3-adc: change adc tests * esp32s3-adc: added comment for esp32c3 * esp32s3-adc: drop debug empty loops * esp32s3-adc: drop duplicate gpio * esp32s3-adc: change return values to 0..65520
* begin adding ring512 implementation * refactor to make operation driven fuzz test * refactor USBCDC.Read to use ring512 * try txhandler separate to flush * working USBCDC with large packets * fix binary size * remove comment * documentation improvements
This refactoring reduces code duplication from the esp32c3/esp32s3 ADC implementation, by reusing the register/efuse calibration code since the same basic procedures are used by both processors. Signed-off-by: deadprogram <ron@hybridgroup.com>
This switches the rp2040 and rp2350 to use the tasks scheduler by default instead of using the cores scheduler. Too many race conditions at present, we need to look into exactly why. In the meantime, going back to the tasks as default will address a lot of these intermittent problems. Signed-off-by: deadprogram <ron@hybridgroup.com>
This refactors and corrects the SPI implentation for the ESP32C3 and ESP32S3 processors. There was a lot of duplicated code, as well as some errors such as incorrectly calculating speed on the esp32c3 implementation. This will also be helpful when adding additional processors that use very similar peripheral registers. Signed-off-by: deadprogram <ron@hybridgroup.com>
Signed-off-by: deadprogram <ron@hybridgroup.com>
This adds a new flash method 'esp32jtag' to explicitly define when this reset method is needed. When flashing esp32c3/esp32s3 boards on Windows this method of board reset is required, otherwise the reset does not take place and the board cannot be flashed. Signed-off-by: deadprogram <ron@hybridgroup.com>
MCAUSE was never being cleared after handling an interrupt. On RISC-V, mret does NOT zero MCAUSE — it retains the last trap cause. Every other TinyGo RISC-V target (FE310, K210, QEMU) explicitly does riscv.MCAUSE.Set(0) after handling. The ESP32-C3 was missing this. Signed-off-by: deadprogram <ron@hybridgroup.com>
Signed-off-by: deadprogram <ron@hybridgroup.com>
This improves the ESP32-C3 USBDevice implementation by using interrupts to properly handle data RX/TX. It also stubs out USB interfaces for HID functions, since those cannot be implemented on ESP32-C3 due to using a JTAG-USB interface. Signed-off-by: deadprogram <ron@hybridgroup.com>
Add processor target (cortex-m33), linker script (2048K flash, 768K RAM), and arduino-uno-q board target. Runtime initializes 160MHz clock via PLL1 from HSI16, with PWR Range 1 and EPOD booster. Also add psctype abstraction for timer PSC register width, needed because the U5 SVD defines PSC as a 16-bit register.
Add machine-level support for STM32U5 family: GPIO ports A-I with clock enables via AHB2ENR1, EXTI pin interrupts (individual EXTI0-15 IRQs), timer definitions (TIM1-8, TIM15-17), RNG, and alternate function clock enables for all peripherals. Add UART support with STM32U585 baud rate and register configuration. Add arduino-uno-q board pin definitions and USART2 serial. Update shared build tags: gpio_revb, gpio_reva, exti_exti, exti_syscfg.
Add I2C timing values for STM32U585 at 160MHz PCLK1 (10/100/400/500 KHz). Add I2C1 peripheral and pin definitions to arduino-uno-q board. Update i2c_revb build tag to include stm32u5.
Add SPIv2 driver for STM32U5 using TXDR/RXDR and CFG1/CFG2 registers, which differ from the classic SPI peripheral on older STM32 families. Implements Configure() and single-byte Transfer(). Add SPI1 peripheral and pin definitions to arduino-uno-q board. Exclude stm32u5 from the shared classic SPI build tag.
Signed-off-by: deadprogram <ron@hybridgroup.com>
The complex 160MHz PLL initialization was hanging the MCU. The fix: Replaced the entire PLL-based clock init with the MSI 4MHz default Signed-off-by: deadprogram <ron@hybridgroup.com>
Signed-off-by: deadprogram <ron@hybridgroup.com> machine/stm32u585: fix PWR peripheral clock was never enabled On STM32U5, PWR is on AHB3 and requires RCC.AHB3ENR.PWREN - unlike some other STM32 families where PWR is always clocked. Without this, all writes to PWR registers (including IO2SV for VDDIO2) were silently dropped, so GPIOG pins could never drive. Signed-off-by: deadprogram <ron@hybridgroup.com> target: correct I2C pin mapping for Arduino UNO Q Signed-off-by: deadprogram <ron@hybridgroup.com>
This adds the specific OpenOCD commands needed for flashing the onboard STM32U585 MCU directly from the Arduino UNO Q board. Thanks to https://github.com/jesdev-io/arduino-uno-q-pio-toolchain for the infor on how to do this. Signed-off-by: deadprogram <ron@hybridgroup.com>
Signed-off-by: deadprogram <ron@hybridgroup.com>
deadprogram
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This PR is just to test the current status of Go1.26 with @dgryski draft branch fixes.