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verilog-design

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Verilog Design Examples with self checking testbenches. Half Adder, Full Adder, Mux, ALU, D Flip Flop, Sequence Detector using Mealy machine and Moore machine, Number of 1s, Binary to Gray Conversion, Up down counter, Clock Divider, PIPO, n bit universal shift register, 4 bit LFSR, Single port RAM, Dual port RAM, Synchronous FIFO, Asynchronous F…

  • Updated Jan 29, 2024
  • Verilog

This project implements a digital vending machine controller using Verilog HDL, designed as a clean and modular Finite State Machine (FSM). The machine supports five different products, accepts coin input, handles online payment, manages cancel operations, calculates change, and generates a dispense signal when payment conditions are met.

  • Updated Nov 17, 2025
  • Verilog

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