drivers: entropy: sf32lb: add trng driver support

boards/sifli/sf32lb52_devkit_lcd/sf32lb52_devkit_lcd.dts

@@ -23,6 +23,7 @@
 		zephyr,code-partition = &code;
 		zephyr,console = &usart1;
 		zephyr,shell-uart = &usart1;
+		zephyr,entropy = &trng;
 	};
 
 	buttons {
@@ -136,3 +137,7 @@
 &wdt {
 	status = "okay";
 };
+
+&trng {
+	status = "okay";
+};

drivers/entropy/CMakeLists.txt

@@ -36,6 +36,7 @@ zephyr_library_sources_ifdef(CONFIG_ENTROPY_PSA_CRYPTO_RNG      entropy_psa_cryp
 zephyr_library_sources_ifdef(CONFIG_ENTROPY_RENESAS_RA          entropy_renesas_ra.c)
 zephyr_library_sources_ifdef(CONFIG_ENTROPY_RV32M1_TRNG         entropy_rv32m1_trng.c)
 zephyr_library_sources_ifdef(CONFIG_ENTROPY_SAM_RNG             entropy_sam.c)
+zephyr_library_sources_ifdef(CONFIG_ENTROPY_SF32LB              entropy_sf32lb.c)
 zephyr_library_sources_ifdef(CONFIG_ENTROPY_SILABS_SIWX91X      entropy_silabs_siwx91x.c)
 zephyr_library_sources_ifdef(CONFIG_ENTROPY_SMARTBOND_TRNG      entropy_smartbond.c)
 zephyr_library_sources_ifdef(CONFIG_ENTROPY_STM32_RNG           entropy_stm32.c)

drivers/entropy/Kconfig

@@ -42,6 +42,7 @@ source "drivers/entropy/Kconfig.psa_crypto"
 source "drivers/entropy/Kconfig.renesas_ra"
 source "drivers/entropy/Kconfig.rv32m1"
 source "drivers/entropy/Kconfig.sam"
+source "drivers/entropy/Kconfig.sf32lb"
 source "drivers/entropy/Kconfig.siwx91x"
 source "drivers/entropy/Kconfig.smartbond"
 source "drivers/entropy/Kconfig.stm32"

drivers/entropy/Kconfig.sf32lb

@@ -0,0 +1,10 @@
+# Copyright (c) 2025, Qingsong Gou <gouqs@hotmail.com>
+# SPDX-License-Identifier: Apache-2.0
+
+config ENTROPY_SF32LB
+	bool "SF32LB Entropy driver"
+	default y
+	depends on DT_HAS_SIFLI_SF32LB_TRNG_ENABLED
+	select ENTROPY_HAS_DRIVER
+	help
+	  Enable driver for SF32LB True Random Number Generator (TRNG).

drivers/entropy/entropy_sf32lb.c

@@ -0,0 +1,88 @@
+/*
+ * Copyright (c) 2025 Qingsong Gou <gouqs@hotmail.com>
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#define DT_DRV_COMPAT sifli_sf32lb_trng
+
+#include <zephyr/arch/cpu.h>
+#include <zephyr/device.h>
+#include <zephyr/drivers/clock_control/sf32lb.h>
+#include <zephyr/drivers/entropy.h>
+#include <zephyr/logging/log.h>
+
+#include <register.h>
+
+LOG_MODULE_REGISTER(entropy_sf32lb, CONFIG_ENTROPY_LOG_LEVEL);
+
+#define TRNG_CTRL offsetof(TRNG_TypeDef, CTRL)
+#define TRNG_STAT offsetof(TRNG_TypeDef, STAT)
+#define TRNG_RAND offsetof(TRNG_TypeDef, RAND_NUM0)
+
+#define TRNG_RAND_NUM_MAX (8U)
+
+#define TRNG_RAND_MASK (TRNG_RAND_NUM_MAX - 1U)
+
+struct entropy_sf32lb_config {
+	uintptr_t base;
+	struct sf32lb_clock_dt_spec clock;
+};
+
+static int entropy_sf32lb_get_entropy(const struct device *dev, uint8_t *buffer, uint16_t length)
+{
+	const struct entropy_sf32lb_config *config = dev->config;
+	int ret = 0;
+
+	sys_set_bit(config->base + TRNG_CTRL, TRNG_CTRL_GEN_SEED_START_Pos);
+	while (!sys_test_bit(config->base + TRNG_STAT, TRNG_STAT_SEED_VALID_Pos)) {
+	}
+
+	/* Generate random data */
+	sys_set_bit(config->base + TRNG_CTRL, TRNG_CTRL_GEN_RAND_NUM_START_Pos);
+	while (!sys_test_bit(config->base + TRNG_STAT, TRNG_STAT_RAND_NUM_VALID_Pos)) {
+	}
+
+	for (uint16_t i = 0U; i < length; i += 4) {
+		uint8_t pos = (i & TRNG_RAND_MASK);
+		/* Copy random data to buffer */
+		if (i + 4 <= length) {
+			memcpy(buffer + i, (void *)(config->base + TRNG_RAND + pos), 4);
+		} else {
+			memcpy(buffer + i, (void *)(config->base + TRNG_RAND + pos), length - i);
+		}
+	}
+
+	return ret;
+}
+
+static DEVICE_API(entropy, entropy_sf32lb_api) = {
+	.get_entropy = entropy_sf32lb_get_entropy,
+};
+
+static int entropy_sf32lb_init(const struct device *dev)
+{
+	const struct entropy_sf32lb_config *config = dev->config;
+	int ret;
+
+	if (!sf32lb_clock_is_ready_dt(&config->clock)) {
+		return -ENODEV;
+	}
+
+	ret = sf32lb_clock_control_on_dt(&config->clock);
+	if (ret < 0) {
+		return ret;
+	}
+
+	return ret;
+}
+
+#define ENTROPY_SF32LB_DEFINE(n)                                                                   \
+	static const struct entropy_sf32lb_config entropy_sf32lb_config_##n = {                    \
+		.base = DT_INST_REG_ADDR(n),                                                       \
+		.clock = SF32LB_CLOCK_DT_INST_SPEC_GET(n),                                         \
+	};                                                                                         \
+                                                                                                   \
+	DEVICE_DT_INST_DEFINE(n, entropy_sf32lb_init, NULL, NULL,                                  \
+			      &entropy_sf32lb_config_##n, PRE_KERNEL_1,                            \
+			      CONFIG_ENTROPY_INIT_PRIORITY, &entropy_sf32lb_api);
+
+DT_INST_FOREACH_STATUS_OKAY(ENTROPY_SF32LB_DEFINE)

dts/arm/sifli/sf32lb52x.dtsi

@@ -105,6 +105,14 @@
 			status = "disabled";
 		};
 
+		trng: trng@5000f000 {
+			compatible = "sifli,sf32lb-trng";
+			reg = <0x5000f000 0x1000>;
+			clocks = <&rcc_clk SF32LB52X_CLOCK_TRNG>;
+			interrupts = <69 0>;
+			status = "disabled";
+		};
+
 		mpi1: memory-controller@50041000 {
 			/*
 			 * configure compatible depending on memory type, choices:

dts/bindings/rng/sifli,sf32lb-trng.yaml

@@ -0,0 +1,18 @@
+# Copyright (c) 2025, Qingsong Gou <gouqs@hotmail.com>
+# SPDX-License-Identifier: Apache-2.0
+
+description: Sifli SF32LB TRNG (True Random Number Generator).
+
+compatible: "sifli,sf32lb-trng"
+
+include: base.yaml
+
+properties:
+  reg:
+    required: true
+
+  interrupts:
+    required: true
+
+  clocks:
+    required: true