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Renamed variable sequence, as sequence is a reserved word in VHDL-2008 #19

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Renamed variable sequence, as sequence is a reserved word in VHDL-2008 #19

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80d289c
Update strings_maps.vhdl
cweickhmann May 7, 2025
d28ec43
Merge pull request #1 from cweickhmann/string_maps-vhdl2008-compatibi…
cweickhmann May 7, 2025
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10 changes: 5 additions & 5 deletions rtl/extras/strings_maps.vhdl
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Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@
--# strings_maps.vhdl - Functions for character set operations
--# Freely available from VHDL-extras (http://github.com/kevinpt/vhdl-extras)
--#
--# Copyright � 2010 Kevin Thibedeau
--# Copyright © 2010 Kevin Thibedeau
--# (kevin 'period' thibedeau 'at' gmail 'punto' com)
--#
--# Permission is hereby granted, free of charge, to any person obtaining a
Expand Down Expand Up @@ -115,7 +115,7 @@ package strings_maps is
--# sequence: String of characters to build into a set
--# Returns:
--# A character set with all unique characters from sequence.
function to_set( sequence : character_sequence ) return character_set;
function to_set( seq : character_sequence ) return character_set;

--## Convert a character into a set.
--# Args:
Expand Down Expand Up @@ -267,11 +267,11 @@ package body strings_maps is


--## Convert a character sequence to a set
function to_set( sequence : character_sequence ) return character_set is
function to_set( seq : character_sequence ) return character_set is
variable result : character_set := null_set;
begin
for i in sequence'range loop
result(sequence(i)) := true;
for i in seq'range loop
result(seq(i)) := true;
end loop;

return result;
Expand Down