Skip to content

QCLINUX: arm64: dts: qcom: x1e80100: Add dma-ranges to support 40 bit… #394

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Open
qianyu-qcom wants to merge 8 commits into
base: tech/all/dt/hamoa
Choose a base branch
from
+1,282 −3
Open

QCLINUX: arm64: dts: qcom: x1e80100: Add dma-ranges to support 40 bit… #394

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
8 commits
Select commit Hold shift + click to select a range
37e24ac
FROMLIST: arm64: dts: qcom: x1e80100: add Coresight nodes for APSS de…
Oct 28, 2025
5339851
FROMLIST: arm64: dts: qcom: Add backlight support for eDP panel
Oct 16, 2025
91ce695
FROMLIST: arm64: dts: qcom: hamoa: enable ETR and CTCU devices
jiegan0107 Nov 4, 2025
8d9dc96
FROMLIST: arm64: dts: qcom: hamoa-iot-som: Unreserve GPIOs blocking S…
xueyaoan Oct 27, 2025
b7a0a54
FROMLIST: arm64: dts: qcom: hamoa-iot-evk: Enable TPM (ST33) on SPI11
khalidfaisal17 Nov 11, 2025
6a60721
FROMLIST: arm64: dts: qcom: Add PCIe3 and PCIe5 support for HAMOA-IOT…
Sep 22, 2025
85bf4e6
FROMLIST: arm64: dts: qcom: Add PCIe3 and PCIe5 regulators for HAMAO-…
Sep 22, 2025
99dd0c2
QCLINUX: arm64: dts: qcom: x1e80100: Add dma-ranges to support 40 bit…
qianyu-qcom Dec 4, 2025
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
145 changes: 145 additions & 0 deletions arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,16 @@
serial1 = &uart14;
};

backlight: backlight {
compatible = "pwm-backlight";
pwms = <&pmk8550_pwm 0 5000000>;
enable-gpios = <&pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH>;
power-supply = <&vreg_edp_bl>;

pinctrl-0 = <&edp_bl_en>, <&edp_bl_pwm>;
pinctrl-names = "default";
};

wcd938x: audio-codec {
compatible = "qcom,wcd9385-codec";

Expand Down Expand Up @@ -183,6 +193,22 @@
regulator-boot-on;
};

vreg_edp_bl: regulator-edp-bl {
compatible = "regulator-fixed";

regulator-name = "VBL9";
regulator-min-microvolt = <3600000>;
regulator-max-microvolt = <3600000>;

gpio = <&pmc8380_3_gpios 10 GPIO_ACTIVE_HIGH>;
enable-active-high;

pinctrl-names = "default";
pinctrl-0 = <&edp_bl_reg_en>;

regulator-boot-on;
};

vreg_nvme: regulator-nvme {
compatible = "regulator-fixed";

Expand All @@ -199,6 +225,48 @@
regulator-boot-on;
};

vreg_pcie_12v: regulator-pcie-12v {
compatible = "regulator-fixed";

regulator-name = "VREG_PCIE_12V";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;

gpio = <&pm8550ve_8_gpios 8 GPIO_ACTIVE_HIGH>;
enable-active-high;

pinctrl-0 = <&pcie_x8_12v>;
pinctrl-names = "default";
};

vreg_pcie_3v3: regulator-pcie-3v3 {
compatible = "regulator-fixed";

regulator-name = "VREG_PCIE_3P3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;

gpio = <&pmc8380_3_gpios 6 GPIO_ACTIVE_HIGH>;
enable-active-high;

pinctrl-0 = <&pm_sde7_main_3p3_en>;
pinctrl-names = "default";
};

vreg_pcie_3v3_aux: regulator-pcie-3v3-aux {
compatible = "regulator-fixed";

regulator-name = "VREG_PCIE_3P3_AUX";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;

gpio = <&pmc8380_3_gpios 8 GPIO_ACTIVE_HIGH>;
enable-active-high;

pinctrl-0 = <&pm_sde7_aux_3p3_en>;
pinctrl-names = "default";
};

/* Left unused as the retimer is not used on this board. */
vreg_rtmr0_1p15: regulator-rtmr0-1p15 {
compatible = "regulator-fixed";
Expand Down Expand Up @@ -807,6 +875,8 @@
aux-bus {
panel {
compatible = "edp-panel";

backlight = <&backlight>;
power-supply = <&vreg_edp_3p3>;

port {
Expand All @@ -832,6 +902,16 @@
status = "okay";
};

&pcie3_port {
vpcie12v-supply = <&vreg_pcie_12v>;
vpcie3v3-supply = <&vreg_pcie_3v3>;
vpcie3v3aux-supply = <&vreg_pcie_3v3_aux>;
};

&pcie5 {
vddpe-3v3-supply = <&vreg_wwan>;
};

&pcie6a {
vddpe-3v3-supply = <&vreg_nvme>;
};
Expand All @@ -856,6 +936,17 @@
};
};

&pm8550ve_8_gpios {
pcie_x8_12v: pcie-12v-default-state {
pins = "gpio8";
function = "normal";
output-enable;
output-high;
bias-pull-down;
power-source = <0>;
};
};

&pm8550ve_9_gpios {
usb0_1p8_reg_en: usb0-1p8-reg-en-state {
pins = "gpio8";
Expand All @@ -867,6 +958,39 @@
};
};

&pmc8380_3_gpios {
edp_bl_en: edp-bl-en-state {
pins = "gpio4";
function = "normal";
power-source = <1>;
input-disable;
output-enable;
};

edp_bl_reg_en: edp-bl-reg-en-state {
pins = "gpio10";
function = "normal";
};

pm_sde7_aux_3p3_en: pcie-aux-3p3-default-state {
pins = "gpio8";
function = "normal";
output-enable;
output-high;
bias-pull-down;
power-source = <0>;
};

pm_sde7_main_3p3_en: pcie-main-3p3-default-state {
pins = "gpio6";
function = "normal";
output-enable;
output-high;
bias-pull-down;
power-source = <0>;
};
};

&pmc8380_5_gpios {
usb0_pwr_1p15_reg_en: usb0-pwr-1p15-reg-en-state {
pins = "gpio8";
Expand All @@ -878,6 +1002,17 @@
};
};

&pmk8550_gpios {
edp_bl_pwm: edp-bl-pwm-state {
pins = "gpio5";
function = "func3";
};
};

&pmk8550_pwm {
status = "okay";
};

&smb2360_0 {
status = "okay";
};
Expand Down Expand Up @@ -905,6 +1040,16 @@
vdd3-supply = <&vreg_l8b_3p0>;
};

&spi11 {
status = "okay";

tpm@0 {
compatible = "st,st33htpm-spi", "tcg,tpm_tis-spi";
reg = <0>;
spi-max-frequency = <20000000>;
};
};

&swr0 {
status = "okay";

Expand Down
82 changes: 80 additions & 2 deletions arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -390,6 +390,22 @@
firmware-name = "qcom/x1e80100/gen70500_zap.mbn";
};

&pcie3 {
pinctrl-names = "default";
pinctrl-0 = <&pcie3_default>;
perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>;

status = "okay";
};

&pcie3_phy {
vdda-phy-supply = <&vreg_l3c_0p8>;
vdda-pll-supply = <&vreg_l3e_1p2>;

status = "okay";
};

&pcie4 {
perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
Expand All @@ -407,6 +423,23 @@
status = "okay";
};

&pcie5 {
perst-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;

pinctrl-0 = <&pcie5_default>;
pinctrl-names = "default";

status = "okay";
};

&pcie5_phy {
vdda-phy-supply = <&vreg_l3i_0p8>;
vdda-pll-supply = <&vreg_l3e_1p2>;

status = "okay";
};

&pcie6a {
perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
Expand Down Expand Up @@ -451,8 +484,30 @@
};

&tlmm {
gpio-reserved-ranges = <34 2>, /* TPM LP & INT */
<44 4>; /* SPI (TPM) */
gpio-reserved-ranges = <34 2>; /* TPM LP & INT */

pcie3_default: pcie3-default-state {
clkreq-n-pins {
pins = "gpio144";
function = "pcie3_clk";
drive-strength = <2>;
bias-pull-up;
};

perst-n-pins {
pins = "gpio143";
function = "gpio";
drive-strength = <2>;
bias-disable;
};

wake-n-pins {
pins = "gpio145";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
};

pcie4_default: pcie4-default-state {
clkreq-n-pins {
Expand All @@ -477,6 +532,29 @@
};
};

pcie5_default: pcie5-default-state {
clkreq-n-pins {
pins = "gpio150";
function = "pcie5_clk";
drive-strength = <2>;
bias-pull-up;
};

perst-n-pins {
pins = "gpio149";
function = "gpio";
drive-strength = <2>;
bias-disable;
};

wake-n-pins {
pins = "gpio151";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
};

pcie6a_default: pcie6a-default-state {
clkreq-n-pins {
pins = "gpio153";
Expand Down
Loading